Abstract
In this paper, a single SiGe Tunnel FET is used to design a Leaky Integrate and Fire (LIF) neuron with significant improvement in area, energy and cost. SiGe Tunnel Field-Effect Transistor (FET) transfer characteristic with steep sub-threshold swing has been used to observe LIF neuronal characteristics. By employing calibrated simulation using Atlas 2D, we have verified that the TFET with LIF characteristics can effectively replicate neuron behavior without relying on external circuitry. The proposed LIF neuron, based on SiGe TFET, exhibits significantly reduced energy consumption, specifically 210 fJ per spike. This energy consumption is \(\approx \)215 times lower compared to previously reported single-device neurons in existing literature. Additionally, we have achieved an impressive recognition precision of 91.3 % for Modified National Institute of Standards and Technology (MNIST) images.
Similar content being viewed by others
Data Availability
No datasets were generated or analysed during the current study.
References
Khanday MA, Khanday FA, Bashir F, Zahoor F (2023) Exploiting steep sub-threshold swing of tunnel fet for energy-efficient leaky integrate-and-fire neuron model. IEEE Trans Nanotechnol
Kino H, Fukushima T, Tanaka T (2020) Generation of stdp with non-volatile tunnel-fet memory for large-scale and low-power spiking neural networks. IEEE J Electron Devices Soc 8:1266–1271
Kamal N, Singh J, Lahgere A, Tiwari PK (2023) Ultra-low power reconfigurable synaptic and neuronal transistor for spiking neural network. IEEE Trans Nanotechnol
Garg N, Pratap Y, Gupta M, Kabra S (2019) Impact of different localized trap charge profiles on the short channel double gate junctionless nanowire transistor based inverter and ring oscillator circuit. AEU - Int J Electron Commun 108:251–261
Vanlalawmpuia K, Ghosh P (2023) Performance assessment of dielectrically modulated negative capacitance germanium source vertical tunnel fet biosensor for detection of breast cancer cell lines. AEU - Int J Electron Commun 171:154902
Bousari NB, Anvarifard MK, Haji-Nasiri S (2019) Improving the electrical characteristics of nanoscale triple-gate junctionless finfet using gate oxide engineering. AEU - Int J Electron Commun 108:226–234
Bhattacharya S, Tripathi SL, Kamboj VK (2023) Design of tunnel fet architectures for low power application using improved chimp optimizer algorithm. Eng Comput 39(2):1415–1458
Kamal N, Singh J (2021) A highly scalable junctionless fet leaky integrate-and-fire neuron for spiking neural networks. IEEE Trans Electron Dev 68(4):1633–1638
Trivedi AR, Datta S, Mukhopadhyay S (2014) Application of silicon-germanium source tunnel-fet to enable ultralow power cellular neural network-based associative memory. IEEE Trans Electron Dev 61(11):3707–3715
Zahoor F, Hussin FA, Isyaku UB, Gupta S, Khanday FA, Chattopadhyay A, Abbas H (2023) Resistive random access memory: introduction to device mechanism, materials and application to neuromorphic computing. Discov Nano 18(1):36
Mani E, Nimmagadda P, Basha SJ, El-Meligy MA, Mahmoud HA (2024) A finfet-based low-power, stable 8t sram cell with high yield. AEU-Int J Electron Commun 175:155102
Kim Y, Kim H, Oh K, Park JH, Baek C-K (2024) Highly biomimetic spiking neuron using sige heterojunction bipolar transistors for energy-efficient neuromorphic systems. Sci Rep 14(1):8356
Rozenberg M, Schneegans O, Stoliar P (2019) An ultra-compact leaky-integrate-and-fire model for building spiking neural networks. Sci Rep 9(1):11123
Izhikevich EM (2003) Simple model of spiking neurons. IEEE Trans Neural Netw 14(6):1569–1572
Dayan Rubin DB, Chicca E, Indiveri G (2004) Firing proprieties of an adaptive analog vlsi neuron
Healy JN (2017) A leaky integrate-and-fire neuron with adjustable refractory period and spike frequency adaptation
Wang R, Thakur CS, Hamilton TJ, Tapson J, van Schaik A (2015) A compact avlsi conductance-based silicon neuron. In: 2015 IEEE biomedical circuits and systems conference (BioCAS), pp 1–4. IEEE
Indiveri G, Linares-Barranco B, Hamilton TJ, Schaik AV, Etienne-Cummings R, Delbruck T, Liu S-C, Dudek P, Häfliger P, Renaud S et al (2011) Neuromorphic silicon neuron circuits. Front Neurosci 5:73
Mayer F, Le Royer C, Damlencourt J-F, Romanjek K, Andrieu F, Tabone C, Previtali B, Deleonibus S (2008) Impact of soi, si 1–x ge x oi and geoi substrates on cmos compatible tunnel fet performance. In: 2008 IEEE International Electron Devices Meeting, pp 1–5. IEEE
Han J-K, Geum D-M, Lee M-W, Yu J-M, Kim SK, Kim S, Choi Y-K (2020) Bioinspired photoresponsive single transistor neuron for a neuromorphic visual system. Nano Lett 20(12):8781–8788
Duan Q, Jing Z, Zou X, Wang Y, Yang K, Zhang T, Wu S, Huang R, Yang Y (2020) Spiking neurons with spatiotemporal dynamics and gain modulation for monolithically integrated memristive neural networks. Nat Commun 11(1):3399
Chatterjee D, Kottantharayil A (2019) A cmos compatible bulk finfet-based ultra low energy leaky integrate and fire neuron for spiking neural networks. IEEE Electron Device Lett 40(8):1301–1304
Dutta S, Kumar V, Shukla A, Mohapatra NR, Ganguly U (2017) Leaky integrate and fire neuron by charge-discharge dynamics in floating-body mosfet. Sci Rep 7(1):8257
Das B, Schulze J, Ganguly U (2018) Ultra-low energy lif neuron using si nipin diode for spiking neural networks. IEEE Electron Device Lett 39(12):1832–1835
Suresh B, Bertele M, Breyer ET, Klein P, Mulaosmanovic H, Mikolajick T, Slesazeck S, Chicca E (2019) Simulation of integrate-and-fire neuron circuits using hfo 2-based ferroelectric field effect transistors. In: 2019 26th IEEE international conference on electronics, circuits and systems (ICECS), pp 229–232. IEEE
Woo S, Cho J, Lim D, Park Y-S, Cho K, Kim S (2020) Implementation and characterization of an integrate-and-fire neuron circuit using a silicon nanowire feedback field-effect transistor. IEEE Trans Electron Dev 67(7):2995–3000
Khanday MA, Bashir F, Khanday FA (2022) Single germanium mosfet-based low energy and controllable leaky integrate-and-fire neuron for spiking neural networks. IEEE Trans Electron Dev 69(8):4265–4270
Han J-K, Seo M, Kim W-K, Kim M-S, Kim S-Y, Kim M-S, Yun G-J, Lee G-B, Yu J-M, Choi Y-K (2019) Mimicry of excitatory and inhibitory artificial neuron with leaky integrate-and-fire function by a single mosfet. IEEE Electron Device Lett 41(2):208–211
Bashir F, Zahoor F, Alzahrani AS, Khan AR (2023) A single schottky barrier mosfet based leaky integrate and fire neuron for neuromorphic computing. Express Briefs, IEEE Transactions on Circuits and Systems II
Chavan T, Dutta S, Mohapatra NR, Ganguly U (2020) Band-to-band tunneling based ultra-energy-efficient silicon neuron. IEEE Trans Electron Dev 67(6):2614–2620
Chander S, Sinha SK, Chaudhary R (2024) Simulation study of multi-source hetero-junction tfet-based capacitor less 1t dram for low power applications. Mater Sci Eng: B 300:117080
Chander S, Sinha SK, Chaudhary R, Goswami R (2022) Effect of noise components on l-shaped and t-shaped heterojunction tunnel field effect transistors. Semicond Sci Technol 37(7):075011
Chander S, Sinha SK, Chaudhary R (2022) Comprehensive review on electrical noise analysis of tfet structures. Superlattices Microstruct 161:107101
Pindoo IA, Sinha SK, Chander S (2021) Performance analysis of heterojunction tunnel fet device with variable temperature. Appl Phys A 127:1–10
Bashir F, Loan SA, Rafat M, Alamoud ARM, Abbasi SA (2015) A high performance gate engineered charge plasma based tunnel field effect transistor. J Comput Electron 14(2):477–485
Panda S, Dash S (2022) Drain dielectric pocket engineering: its impact on the electrical performance of a hetero-structure tunnel fet. Silicon 14(15):9305–9317
Mishra V, Verma YK, Gupta SK, Rathi V (2021) A sige-source doping-less double-gate tunnel fet: design and analysis based on charge plasma technique with enhanced performance. Silicon 1–8
(2019) Atlas device simulation software. Silvaco Int., Santa Clara, CA, USA
Wang Z, Crafton B, Gomez J, Xu R, Luo A, Krivokapic Z, Martin L, Datta S, Raychowdhury A, Khan AI (2018) Experimental demonstration of ferroelectric spiking neurons for unsupervised clustering. In: 2018 IEEE international electron devices meeting (IEDM), pp 13–3. IEEE
Author information
Authors and Affiliations
Contributions
FB.: Conceptualization, Methodology, Software, Formal analysis, Investigation, Visualization, Data Curation, Writing–Original Draft. FZ.: Validation, simulation, Resources, Data Curation, Review & Editing. ASZ: Review, Formal analysis, Investigation, Visualization.
Corresponding author
Ethics declarations
Competing Interests
The authors declare no competing interests.
Disclosure of Potential Conflicts of Interest
There is no conflict of interest among the authors while submitting the manuscript.
Consent for Publication
Yes
Informed Consent
All authors have been informed before submitting the manuscript.
Additional information
Publisher's Note
Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.
Rights and permissions
Springer Nature or its licensor (e.g. a society or other partner) holds exclusive rights to this article under a publishing agreement with the author(s) or other rightsholder(s); author self-archiving of the accepted manuscript version of this article is solely governed by the terms of such publishing agreement and applicable law.
About this article
Cite this article
Bashir, F., Zahoor, F. & Alzahrani, A.S. Utilizing Forward Characteristics of Pocket Doped SiGe Tunnel FET for Designing LIF Neuron Model. Silicon (2024). https://doi.org/10.1007/s12633-024-03016-6
Received:
Accepted:
Published:
DOI: https://doi.org/10.1007/s12633-024-03016-6