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Design and Analysis of Si/GaSb HTFET-Based 7T SRAM Cell for Ultra-Low Voltage Applications

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Abstract

This study introduces a novel double-dielectric Si/GaSb heterojunction TFET, incorporating III-V material in the pockets and source region to enhance band-to-band tunneling. Utilizing a high-\(\kappa \) dielectric in conjunction with \(\varvec{SiO_2}\) as a gate oxide, the proposed TFET demonstrates notable advancements, including an 81% reduction in OFF-current and a substantial 1.58-decade enhancement in ON-current. However, a moderate 30% increase in the average subthreshold swing is observed compared to the referenced pocket-based GaSb/Si VTFET. The RF characteristics reveal a significant 1.62-decade increase in transconductance and a 1.8-decade increase in output conductance, coupled with impressive cut-off frequency and gain-bandwidth product relative to the same reference. Additionally, the study implements a 7T SRAM cell at the device-to-circuit level through a lookup table-based Verilog-A methodology. It showcases higher noise margins and lower delays, rendering it suitable for ultra-low voltage applications requiring high-speed performance and enhanced stability.

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Acknowledgements

Gadarapulla Rasheed acknowledges the receipt of the Junior Research Fellowship through the scheme of National Fellowship for Other Backward Classes funded by the Ministry of Social Justice & Empowerment, Govt. of India, New Delhi, under Grant F. 44-1/2018 (SA-III).

Funding

No funding was received for conducting this study.

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Author notes

  1. Rasheed Gadarapulla, Sridevi Sriadibhatla, and Rajasekhar Nagulapalli contributed equally to this work.

Authors and Affiliations

  1. Department of Micro and Nanoelectronics, Vellore Institute of Technology, Vellore, 632014, Tamil Nadu, India

    Sai Lakshmi Prasanth Kannam, Rasheed Gadarapulla & Sridevi Sriadibhatla

  2. Department of Electronics and Communication, Oxford Brookes University, Wheatley Campus, Wheatley, UK

    Rajasekhar Nagulapalli

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  1. Sai Lakshmi Prasanth Kannam
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  2. Rasheed Gadarapulla
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  3. Sridevi Sriadibhatla
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  4. Rajasekhar Nagulapalli
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Contributions

All authors contributed to the study, conception, and design. R.G. performed device-level TCAD simulations and lookup-table generation. S.L.P.K performed SRAM circuit simulations and analysis. S.S. and R.N. edited the manuscript and provided suggestions. S.L.P.K wrote the first draft of the manuscript, and all authors commented on previous versions. All authors read and approved the final manuscript.

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Correspondence to Sridevi Sriadibhatla.

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Kannam, S.L.P., Gadarapulla, R., Sriadibhatla, S. et al. Design and Analysis of Si/GaSb HTFET-Based 7T SRAM Cell for Ultra-Low Voltage Applications. Silicon 16, 2369–2383 (2024). https://doi.org/10.1007/s12633-023-02834-4

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