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Negative Capacitance Ferroelectric FET Based on Short Channel Effect for Low Power Applications

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Abstract

The electrical properties of ferroelectric (Fe) FETs with Negative Capacitance (NC) have been explored theoretically at temperatures ranging from -280 to +360 degrees Celsius. Temperature influences ferroelectric thin film surface potential amplification with a fixed thickness, according to the findings. As the temperature of the ferroelectric NC effect rises, the device's transfer and output qualities deteriorate. The findings of this work could be used in the future to help improve FeFET design and performance for applications that require low power dissipation. The NC effect in symmetric long channel double-gate Junctionless transistors with two gates is predicted using an analytical model based on the charge principle. We explored the effect of ferroelectric thickness on I-V characteristics to better understand ferroelectric materials. In our model, positive capacitance lowers short channel effects while enhancing current overdrive, resulting in lower power consumption and more efficient transistor size scaling. Based on our calculations for a long channel Junctionless with NC, the device's ON current will be six times higher than that of a Junctionless FET. We use oxygen ion mobility to explain sub-60 mV/dec results in thin-film Ta2O5/ZnO transistors with dynamic gate bias sweep. The oxygen ions in Ta2O5 direct the model in dynamic gate bias sweep, resulting in NC. When achieving a sub 60 mV/decade subthreshold slope, the study finishes by revealing design tradeoffs that give an engineer or physicist insight into the current status of ferroelectric nanowires and ferroelectric FETs' uses and limitations.

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Acknowledgements

The authors are thankful to Gokaraju Rangaraju Institute of Engineering & Technology, Hyderabad for their cooperation and support during this research work.

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Authors and Affiliations

  1. Department of ECE, MVJ College of Engineering, Bangalore, India

    S. Kanithan

  2. Department of ECE, Gokaraju Rangaraju Institute of Engineering and Technology, Hyderabad, Telangana, 500090, India

    N. Arun Vignesh

  3. Department of ECE, Veltech Rangarajan Dr. Sagunthala R&D Institute of Science and Technology, Chennai, 600062, India

    S. Jana

  4. Department of ECE, SNS College of Engineering, Coimbatore, 641107, India

    C. Gokul Prasad

  5. Department of Embedded Technology, School of Electronics Engineering, Vellore Institute of Technology, Vellore, 632014, India

    E. Konguvel

  6. Department of ECE, Erode Sengunthar Engineering College, Erode, Tamilnadu, 638057, India

    S. Vimalnath

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  1. S. Kanithan
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  2. N. Arun Vignesh
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  3. S. Jana
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  4. C. Gokul Prasad
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  5. E. Konguvel
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Contributions

N Arun Vignesh and S Kanithan: Conceptualization; N Arun Vignesh and S Jana: investigation; N Arun, Vignesh, S Kanithan, S Jana, C Gokul Prasad, E Konguvel, S. Vimalnath : resources; N Arun Vignesh ,C Gokul Prasad, E Konguvel and S. Vimalnath : data curation; N. Arun Vignesh, S Kanithan and S. Vimalnath : writing—original draft preparation; N. Arun Vignesh, S Jana,C Gokul Prasad and E Konguvel: writing—review and editing; N. Arun Vignesh, S Kanithan and S. Vimalnath: visualization; N. Arun Vignesh: supervision.

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Correspondence to S. Kanithan or N. Arun Vignesh.

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Kanithan, S., Vignesh, N.A., Jana, S. et al. Negative Capacitance Ferroelectric FET Based on Short Channel Effect for Low Power Applications. Silicon 14, 9569–9579 (2022). https://doi.org/10.1007/s12633-021-01625-z

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  • DOI: https://doi.org/10.1007/s12633-021-01625-z

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