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A 2D Analytical Modeling and Simulation of Double Halo Triple Material Surrounding Gate (DH-TMSG) MOSFET

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Abstract

In the nanoscale regime, scaling is the driving force for the miniaturized device applications. Many devices are scaled in size and performance analyses are measured. The scaling of MOSFET leads to the introduction of short channel effects. As the devices are scaled, the magnitude of these short channel effects hinders the performance of the device. In order to minimize these effects, gate engineering and channel engineering are performed. The modification in the gate material is pronounced as gate engineering and the changes in the doping concentration lead to channel engineering. In this paper, a combination of gate and channel engineering is utilized to reduce the short channel effects. A device called double halo triple material surrounding gate(DH-TMSG) MOSFET is introduced for the first time and its 2D analytical model is derived. The performance of the device is analyzed using TCAD ATLAS simulation tool. It has been found from the simulation results that DH-TMSG structure of MOSFET produce the ION current of 10−3A/μm and IOFF current of 10−12A/μm which proves to reduce the leakage current.

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Authors and Affiliations

  1. Department of ECE, Velammal College of Engineering and Technology, Madurai, India

    P. Suveetha Dhanaselvam

  2. Department of ECE, Dayananda Sagar College of Engineering, Bangalore, Karnataka, India

    P. Vimala

  3. Department of ECE, National Engineering College, Kovilpatti, India

    T. S. Arun Samuel

Authors
  1. P. Suveetha Dhanaselvam
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  2. P. Vimala
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  3. T. S. Arun Samuel
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Correspondence to P. Suveetha Dhanaselvam.

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Dhanaselvam, P.S., Vimala, P. & Samuel, T.S.A. A 2D Analytical Modeling and Simulation of Double Halo Triple Material Surrounding Gate (DH-TMSG) MOSFET. Silicon 13, 2631–2637 (2021). https://doi.org/10.1007/s12633-020-00617-9

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  • DOI: https://doi.org/10.1007/s12633-020-00617-9

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