Skip to main content
Log in

Improved Drain Current Characteristics of Germanium Source Triple Material Double Gate Hetero-Dielectric Stacked TFET for Low Power Applications

  • Original Paper
  • Published:
Silicon Aims and scope Submit manuscript

Abstract

In this paper a novel device structure of Triple Material Double Gate (TMDG) SiO2/High-k stacked (Hetero-Dielectric) Tunnel Field Effect Transistor (TFET) with germanium source has been proposed. Three different work function metals over the channel region act as a barrier in the channel which inturn restricts ambipolar effect. Also the concept of hetero-junction at the interface of source to channel region of the proposed device helps to improve the ION current characteristics. The parameters like surface potential, electric field, ION current and IOFF current of the hetero-junction TMDG hetero-dielectric stacked TFET device have been investigated in this work. The proposed device gives an improved ION current and better suppression in leakage current. From the presented results it is found that very low leakage current IOFF (approximately 10−17 A/mm), prominent enhancement in ION current (approximately 10−4 A/mm) and the ION/IOFF current ratio is 1013. Also there is a notable enhancement in ON and OFF current compared with the silicon based TMDG hetero dielectric TFET. The proposed device exhibit unity current-gain cut-off frequency of 50 GHz, while it is 37 GHz for silicon source TMDG hetero-dielectric stacked TFET. 10−17A/mm leakage current confirms the reduced power consumption and 10−4A/mm ON current confirms to speed up the charging and discharging of output capacitance. The results reveal that the germanium source (Hetero-junction) TM-DG Hetero-Dielectric TFET provides better result for Electric field, ION current, IOFF current and ION/IOFF current ratio than the silicon based TM-DG Hetero-Dielectric TFET. The novel proposed device is fitting for low power applications.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Similar content being viewed by others

References

  1. Young KK (1989) Short-channel effect in fully depleted SOI MOSFETs. IEEE Trans Electron Devices 36(2):399–402

    Article  Google Scholar 

  2. Belaid MA, Nahhas AM, Gares M, Daoud K, Latry O (2014) Leakage current effects on N-MOSFETs after thermal ageing in pulsed life tests. Microelectron J 45(12):1800–1805

    Article  CAS  Google Scholar 

  3. Wu J, Min J, Taur Y (2015) Short Channel Effects in Tunnel FETs. IEEE Trans Electron Devices 62(9):3019–3024

    Article  Google Scholar 

  4. Qin Z, Wei Z, Seabaugh A (2006) Low-subthreshold swing tunnel transistors. IEEE Electron device Lett 27(4):297–300

    Article  Google Scholar 

  5. Vishnoi R, Kumar MJ (2014) Compact analytical model of Dual Material Gate Tunneling Field-Effect Transistor using Interband Tunneling and Channel Transport. IEEE Trans Electron Devices 61(6):1936–1942

    Article  CAS  Google Scholar 

  6. Ionescu AM, Riel H (2011) Tunnel Field – effect transistors as energy efficient electronic switches. Nature 479(7373):329–337

    Article  CAS  Google Scholar 

  7. Lee MJ, Choi WY (2011) Analytical Model of a single-gate silicon-on-insulator (SOI) tunneling field-effect transistors (TFETs). Solid State Electron 63:110–114

    Article  CAS  Google Scholar 

  8. Gholizadeh M, Hosseini SE (2014) A 2-D Analytical model for Double Gate Tunnel FETs. IEEE Trans Electron Devices 61(5):494–500

    Article  Google Scholar 

  9. Gracia D, Nirmal D, Moni J (2018) Impact of Leakage Current in Germanium Channel based DMDG TFET using Drain-Gate underlap Technique. AEU-Int J Electron Commun 96:164–169

    Article  Google Scholar 

  10. Prabhat V, Dutta AK (2016) Analytical surface potential and drain current models of dual metal gate double gate tunnel FETs. IEEE Trans Electron Devices 63(5):2190–2196

    Article  Google Scholar 

  11. Bagga N, Sarkar SK (2015) An analytical model for tunnel double gate. TFET IEEE Trans Electron Devices 62(7):2136–2142

    Article  CAS  Google Scholar 

  12. Baral B, Das AK, De D, Sarkar A (2016) An analytical model of triple-material double-gate metal–oxide–semiconductor field-effect transistor to suppress short-channel effects. Int J Numeric Model: Electron Netw, Devices Fields 29(1):47–62

    Article  Google Scholar 

  13. Balamurugan NB, Manikandan S, Lakshmi Priya G, Srimathi G (2016) Analytical modeling of dual material gate all around stack architecture of tunnel FET, in proceedings 29th international conference on VLSI Design, 16:294–299

  14. Choi WY, Park B-G, Lee JD, Liu T-JK (2007) Tunneling field Effect Transistors (TFETs) with subthreshold swing (SS) less than 60 mv/dec. IEEE Electron Devices Lett 28(8):743–745

    Article  CAS  Google Scholar 

  15. C Grillet, A Cresti, MG Pala (2018) Vertical GaSb/AlSb/InAs Heterojunction Tunnel FETs: A full Quantum Study, IEEE Trans Electron Devices, 65 (7)

  16. Samuel TSA, Balamurugan NB (2014) Analytical modeling and simulation of germanium single gate silicon on insulator TFET. J Semicond 35(3):1–4

    Google Scholar 

  17. Boucartand K, Ionescu AM (2007) Double- gate tunnel FET with high-K gate dielectric. IEEE Trans Electron Devices 54(7):1725–1733

    Article  Google Scholar 

  18. Damrongplasit N, Shin C, Kim SH, Vega RA Study of Random Dopant Fluctuations effects in Germanium-Source Tunnel FETs. IEEE Trans Electron Devices 58(10):3541–3548

  19. Liu X, Hu H, Wang M, Zhang H, Wang B (2018) Study of fully depleted Ge double-gate n-type tunneling field-effect transistors for improvement in on-state current and sub-threshold swing. Phys E Phys E 95:51–58

    Google Scholar 

  20. Lee Y, Nam H, Park J-D, Shin C (2015) Study of work function variation for High –K /Metal –Gate Ge-source Tunnel Field –Effect Transistors. IEEE Trans Electron Devices 2(7):324–326

    Google Scholar 

  21. Ahmed MM Hamam A, Schmidt ME, Muruganathan M, Suzuki S, Mizuta H (2018) Sub-10 nm graphene nano-ribbon tunnel field-effect transistor Carbon 126; 588-593

  22. Kim M, Wakabayashi Y, Nakane R, Yokoyama M, Takenaka M, Takagi S, (2014) High Ion/Ioff Ge-source ultrathin body strained-SOI Tunnel FETs, IEDM 14-331, 2014

  23. Yawei L, Qin W, Wang C, Liao L, Liu X (2018) Recent advances in low-dimensional Heterojunction Based tunnel field effect transistors. Adv Elect Mater 1800569:2018

  24. Bal P, Ghose B, Partha M, Akram MV, Tripathi BMM (2014) Dual material gate junctionless tunnel field effect transistor effect. J Comput Electron 13:230–234

    Article  CAS  Google Scholar 

  25. Bardon MG, Neves H, Puers R, Van Hoof C (2010) Pseudo-Two-Dimensional Model for Double Gate Tunnel FETs considering the junctions depletion regions. IEEE Trans Electron Devices 57(4):827–834

    Article  CAS  Google Scholar 

  26. Kumar S, Goel E, Singh K, Singh B, Singh PK, Baral K, Jit S (2017) 2D Analytical Modeling of the Electrical Characteristics of Dual material Double Gate TFETs with a SiO2/HfO2 Stacked Gate Oxide Structure. IEEE Trans Electron Devices 64(3):960–968

    Article  CAS  Google Scholar 

  27. Verhulst AS, Soree B, Leonelli D, Vandenberghe WG, Groeseneken G (2010) Modelling the single-gate, double-gate and gate-all around tunnel field-effect transistor. J Appl Phys 107:1–8

    Article  Google Scholar 

  28. Graef M, ThomasHoltij FH, AlexanderKloes BI (2014) 2D closed form model for the electrostatics in hetero-junction double-gate tunnel-FETs for calculation of band-to-band tunneling current. Microelectron J 45:1144–1153

    Article  Google Scholar 

  29. Kane EO (1960) Zener tunneling in semiconductors. J Phys Chem Solids 21(2):181–188

    Article  Google Scholar 

  30. Dash S, Mishra GP (2015) A new analytical threshold voltage model of cylindrical gate tunnel FET (CG-TFET), Superlatticies and microstructures, 211-220

  31. Upasana RN, Saxena M, Gupta M (2015) Modeling and TCAD Assessment for Gate Material and Gate Dielectric Engineered TFET Architectures: Circuit-Level Investigation for Digital Applications. IEEE Trans Electron Devices 62(10):3348–3356

    Article  Google Scholar 

  32. Kao K-H, Verhulst AS, Vandenberghe WG, Soree B, Groeseneken G, De Meyer K (2012). Direct and indirect band-to-band tunneling in germanium-based TFETs IEEE Trans Electron Devices 59(2):292–301

  33. Sheeja Herobin Rani C, Bhoopathy Bagan K, Nirmal D, Solomon Roach R (2019) Enhancement of Performance in TFET by Reducing High-K Dielectric Length and Drain Electrode Thickness, Silicon. https://doi.org/10.1007/s12633-019-00328-w

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to C. Sheeja Herobin Rani.

Additional information

Publisher’s Note

Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Rani, C.S.H., Bagan, K.B. & Roach, R.S. Improved Drain Current Characteristics of Germanium Source Triple Material Double Gate Hetero-Dielectric Stacked TFET for Low Power Applications. Silicon 13, 2753–2762 (2021). https://doi.org/10.1007/s12633-020-00556-5

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s12633-020-00556-5

Keywords

Navigation