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Threshold Voltage Modeling of tri-Gate Schottky-Barrier (TGSB) Field-Effect-Transistors (FETs)

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Abstract

In this work, a threshold voltage model of Tri-Gate Schottky-Barrier (TGSB) MOSFET is presented by coupling threshold voltage models of symmetric and asymmetric double-gate Schottky-Barrier (SB) MOSFET structures giving due weight to each structure. The electrostatic potentials of double-gate SB MOSFETs are obtained using evanescent mode analysis method considering light doping in the channel region. In TGSB MOSFETs, the leakiest path in the subthreshold regime of device operation is located at the mid of the bottom of the channel region. The minimum potential of this leakiest path is considered to be the virtual cathode potential, which is subsequently used to calculate the threshold voltage of the SB MOS devices. The effects of device parameters like oxide thickness, buried oxide (BOX) thickness, channel height, width, and length, doping concentration and Schottky-Barrier height on threshold voltage have been extensively studied in this work. The proposed model results have been verified with numerical simulation results obtained from the 3-D device simulator of Sentaurus TCAD.

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Authors and Affiliations

  1. Department of Electrical Engineering, Indian Institute of Technology Patna, Bihta, Bihar, 801106, India

    P. S. T. N. Srinivas, Arun Kumar & Pramod Kumar Tiwari

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  1. P. S. T. N. Srinivas
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  2. Arun Kumar
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  3. Pramod Kumar Tiwari
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Correspondence to P. S. T. N. Srinivas.

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Srinivas, P.S.T.N., Kumar, A. & Tiwari, P.K. Threshold Voltage Modeling of tri-Gate Schottky-Barrier (TGSB) Field-Effect-Transistors (FETs). Silicon 13, 25–35 (2021). https://doi.org/10.1007/s12633-020-00400-w

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