Performance Evaluation of Transition Metal Dichalcogenides Based Steep Subthreshold Slope Tunnel Field Effect Transistor


In this paper, Transition Metal Dichalcogenides (TMDC) material based Tunnel Field Effect Transistor (TFET) has been studied by including coverage of a wide range of characteristics. Different analog/RF and linearity properties of TMDC materials Molybdenum disulfide (MoS2), Molybdenum Diselenide (MoSe2), Molybdenum Ditelluride (MoTe2), Tungsten disulfide (WS2) and Tungsten Diselenide (WSe2) have been analyzed. Developed device is compared with different previously proposed devices and much better characteristics are observed. Device structure used for simulation exhibit steep threshold slope. The lowest value of slope observed is 16.11 mV/dec for MoS2 and the highest value is obtained for MoSe2 as 21.6 mV/dec. Highest ION/IOFF ratio is obtained for MoS2(≈1013). TMDC materials exhibit properties which make them promising candidates to replace Silicon in the future.

This is a preview of subscription content, access via your institution.


  1. 1.

    Koswatta SO, Lundstrom MS, Nikonov MS (2009) D.E. performance comparison between tunneling transistors and conventional MOSFETS. IEEE Transaction on Electron Devices 56(3):456–465

    CAS  Article  Google Scholar 

  2. 2.

    Colinge JP, Lee CW, Afzalian A, Akhayan ND, Yan R, Ferain I, Razavi P, O’Neill B, Blake A, White M, Kelleher AM, McCarthy B, Murphy R (2010) Nanowire transistors without junctions. Nat Nanotechnol 5(3):225–229

    CAS  Article  Google Scholar 

  3. 3.

    Bhuwalka KK, Schulze J, Eisele I (2010) Scaling the vertical Tunnel FET with Tunnel bandgap modulation and gate workfunction engineering. IEEE Transactions on Electron Devices 52(5):909–917

  4. 4.

    Choi WY, Park BG, Lee JD (2007) Tunneling field-effect transistors(TFETs) with subthreshold swing(ss) less than 60 mV/Dec. IEEE Electron Device Letters 28(8):743–745

    CAS  Article  Google Scholar 

  5. 5.

    Jagadesh Kumar M (2013) Doping-less tunnel field effect transistor: design and investigation. IEEE Transaction on Electron Devices 60(10):3285–3290

    Article  Google Scholar 

  6. 6.

    Mayrov AS, Gorbachev RV (2011) Micrometer scale ballistic transport in encapsulated graphene at room temperature. Nano Lett 11:2396–2399

    Article  Google Scholar 

  7. 7.

    Rawat A, Jena N, Dimple, De Sarkar A (2018) A comprehensive study in carrier mobility and artificial photosynthetic properties in Group VI transition metal dichalogenide monolayer. Journal of Materials Chemistry

  8. 8.

    Jin Z, Li X (2014) Jeffrey T. Mullen and Ki Wook Kim, Intrinsic Transport Properties of Electrons and Holes in Monolayer Transition Metal Dichalcogenides. Physical Review B, Cornell University Press 90

  9. 9.

    Neupane MR (2015) Electronic and vibrational properties of 2D materials from monolayer to bulk. IEEE International Workshop on Computational Electronics

  10. 10.

    Cai Z, Liu B, Zou X, Cheng H-M (2018) Chemical vapour deposition growth and applications of two dimensional materials and their properties. Chemical Reviews 118:6091–6133

    CAS  Article  Google Scholar 

  11. 11.

    Campbell PM, Smith JK, Ready J, Vogel EM (2017) Material Constraints and Scaling of 2-D Vertical Heterostructure Interlayer Tunnel Field-Effect Transistors. IEEE Transactions on Electron Devices 64:2714–2720

    CAS  Article  Google Scholar 

  12. 12.

    Kumar N, Raman A (2019) Design and Investigation of Charge-Plasma Based Work Function Engineered DualMetal-Heterogeneous Gate Si-Si0.55Ge0.45 GAA-Cylindrical NWTFET for Ambipolar Analysis. IEEE Transaction on Electron Devices 66

  13. 13.

    Zhao Y-H, Yang F, Wang J, Guo H, Ji W (2015) Continuously tunable electronic structure of transition metal dichalocgenides. Superlattices 5:8356

    CAS  Google Scholar 

  14. 14.

    Luisier M, Klimeck G (2010) Simulation of nanowire tunneling transistors: from the WentzeleKramerseBrillouin approximation to full-band phonon assisted tunnelling. J Appl Phys 107(08)

  15. 15.

    Hubbard KJ, Schlom DG (1996) Thermodynamic stability of binary oxides in contact with silicon. J Mater Res 11(11):2757–2776

    CAS  Article  Google Scholar 

  16. 16.

    Sutar S, Asselberghs I, Lin DHC, Thean AV-Y, Radu I (2017) FETs on 2-D Materials: Deconvolution of the Channel and Contact Characteristics by Four-Terminal Resistance Measurements on WSe2 Transistors. IEEE Transactions on Electron Devices 64:2970–2976

    CAS  Article  Google Scholar 

  17. 17.

    Cao W, Kang J, Sarkar D, Liu W, Banerjee K (2015) 2D semiconductor FETs- Projections and design for sub-10nm VLSI. IEEE Transaction on Electron Devices 62:3459–3469

    CAS  Article  Google Scholar 

  18. 18.

    Peng Wu, Tarak Ameen, Huairuo Zhang, Leonid A. Bendersky, Hesameddin Llatikhameneh, Gerhard Klimeck, Rajib Rahman, Albert V. Davvydov and Joerg Appenzeller,” Complementry Black Phosphorous Tunneling Field-Effect transistors” ACS NANO, 2018. Supplementry file :

  19. 20.

    Cao J, Park J, Triozon F, Pala MG, Cresti A (2018) Simulation of 2D material-based tunnel field-effect transistors: planar vs. vertical architectures. ISTE Open Science 1

  20. 21.

    Liu F, Wang J, Guo H (2015) Atomistic Simulations of device physics in Monolayer Transition Metal Dichalcogenide Tunneling Transistors. IEEE Transactions on Electron Devices 63:311–317

    Article  Google Scholar 

  21. 22.

    Khatami Y, Banerjee K (2009) Steep Subthreshold Slope n- and p-Type Tunnel-FET Devices for Low-Power and Energy-EfficientDigital Circuits. IEEE Transactions on Electron Devices 56(11)

  22. 23.

    Rahman E, Shadman A, Ahmed I, Khan SUZ, Khosru QDM (2018) A physically based compact I-V model for monolayer TMDC channel MOSFET and DMFET biosensor. Nanotechnology, IOP publishing

  23. 24.

    You W-X, Tsai C-P, Su P (2018) Short-channel effects in 2D negative-capacitance field effect transistors. IEEE transactions on Electron Devices 65:1604–1610

    CAS  Article  Google Scholar 

  24. 25.

    Sedighi B, Hu XS, Liu H, Nahas JJ, Niemier M (2015) Analog circuit design using tunnel-FETs. IEEE Transactions on Circuits and Systems I 62:39–48

    Article  Google Scholar 

  25. 26.

    A. R. Trivedi, S. Carlo and S. Mukhopadhyay, “Exploring tunnel-FET for ultra low power analog applications: a case study on operational transconductance amplifier,” in Proceedings of the 50th Annual Design Automation Conference, p. 109, IEEE, 2013

  26. 27.

    Chaujar R, Kaur R, Saxena M, Gupta M, Gupta RS (2009) TCAD assessment of Gate Electrode Workfunction Engineered Recessed Channel (GEWE-RC) MOSFET and its multi-layered gate architecture, Part II: Analog and large signal performance evaluation. Superlattice Microst 46(4):645–655

    CAS  Article  Google Scholar 

  27. 28.

    Gupta N, Chaujar R (2016) Optimization of high-k and gate metal workfunction for improved analog and intermodulation performance of Gate Stack (GS)-GEWE-SiNW MOSFET. Superlattice Microst 97:630–641

    CAS  Article  Google Scholar 

Download references

Author information



Corresponding author

Correspondence to Maneesha Gupta.

Additional information

Publisher’s Note

Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Rights and permissions

Reprints and Permissions

About this article

Verify currency and authenticity via CrossMark

Cite this article

Kumar, P., Gupta, M. & Singh, K. Performance Evaluation of Transition Metal Dichalcogenides Based Steep Subthreshold Slope Tunnel Field Effect Transistor. Silicon 12, 1857–1864 (2020).

Download citation


  • Analog parameters
  • Two dimensional materials
  • Distortion
  • Linearity
  • TFET