Abstract
Quasi-Newton methods are the most widely used methods to find local maxima and minima of functions in various engineering practices. However, they involve a large amount of matrix and vector operations, which are computationally intensive and require a long processing time. Recently, with the increasing density and arithmetic cores, field programmable gate array (FPGA) has become an attractive alternative to the acceleration of scientific computation. This paper aims to accelerate Davidon-Fletcher-Powell quasi-Newton (DFP-QN) method by proposing a customized and pipelined hardware implementation on FPGAs. Experimental results demonstrate that compared with a software implementation, a speed-up of up to 17 times can be achieved by the proposed hardware implementation.
This is a preview of subscription content, log in via an institution to check access.
Similar content being viewed by others
References
Pallaschke D, Rolewicz S. Foundations of Mathematical Optimization[M]. Springer, Germany, 2009.
Lewis A S, Overton M L. Nonsmooth optimization via quasi-Newton methods[J]. Mathematical Programming, 2013, 141(1): 135–163.
Mokhtari A, Ribeiro A. A dual stochastic DFP algorithm for optimal resource allocation in wireless systems[C]. In: 2013 IEEE 14th Workshop on Signal Processing Advances in Wireless Communications. Darmstadt, Germany, 2013.
Kuwabara S, Kohira Y, Takashima Y. An effective overlap removable objective for analytical placement[J]. IEICETransaction on Fundamentals of Electronics, Communications and Computer Sciences, 2013, E96.A(6): 1348–1356.
Alaei H K, Yazdizadeh A, Aliabadi A. Nonlinear predictive controller design for load frequency control in power system using quasi Newton optimization approach[C]. In: 2013 IEEE International Conference on Control Applications. Hyderabad, India, 2013.
Ninomiya H. Robust training of multilayer neural networks using parameterized online quasi-Newton algorithm [C]. In: 2011 Fourth International Conference on Machine Learning and Applications. Honolulu, USA, 2011.
De Matos G M, Neto H C. Memory optimized architecture for efficient Guass-Jordan matrix inversion[C]. In: 2007 3rd Southern Conference on Programmable Logic. Mar Del Plata, Argentina, 2007.
Boland D, Constantinides G A. An FPGA-based implementation of the MINRES algorithm[C]. In: 2008 International Conference on Field Programmable Logic and Applications. Heidelberg, Germany, 2008.
Roldao A, Constantinides G A. A high throughput FPGAbased floating point conjugate gradient implementation for dense matrices[J]. ACM Transactions on Reconfigurable Technology and Systems, 2010, 3(1): Article 1.
Munoz D M, Llanos C H, Coelho L dos S et al. Comparison between two FPGA implementation of the particle swarm optimization algorithm for highperformance embedded applications[C]. In: 2010 IEEE Fifth International Conference on Bio-Inspired Computing: Theories and Applications. Changsha, China, 2010.
Christou I T. Quantitative Methods in Supply Chain Management: Models and Algorithms[M], Springer-Verlag, London, UK, 2011.
Liu Qianjin, Qin Sishi. A DFP-neural networks algorithm for analysis of power system harmonics[C]. In: 2010 Asia-Pacific Power and Energy Engineering Conference. Chengdu, China, 2010.
Press W H, Teukolsky S A, Vetterling W T et al. Numerical Recipes: The Art of Scientific Computing[M]. 3rd Edition. Cambridge Press Publisher, New York, USA, 2007.
Zhao Yisheng, Ji Hong, Chen Zhonghui. Noisy chaotic neural network for resource allocation in high-speed train OFDMA system[J]. Transactions of Tianjin University, 2014, 20(5): 368–374.
Wu Qing, Zhao Xinhua, Zhao Quan. Application of artificial neural network in the research of the Bohai Bay eutrophication[J]. Transactions of Tianjin University, 2007, 13(6): 437–440.
Author information
Authors and Affiliations
Corresponding author
Additional information
Supported by the National Natural Science Foundation of China(No. 61574099).
Liu Qiang, born in 1978, male, Dr, associate Prof.
Rights and permissions
About this article
Cite this article
Liu, Q., Sang, R. & Zhang, Q. FPGA-based acceleration of Davidon-Fletcher-Powell quasi-Newton optimization method. Trans. Tianjin Univ. 22, 381–387 (2016). https://doi.org/10.1007/s12209-016-2870-0
Accepted:
Published:
Issue Date:
DOI: https://doi.org/10.1007/s12209-016-2870-0