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Design of a high efficiency boost DC-DC converter

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Abstract

An accurate circuit of PWM/PFM mode converting and a circuit of auto-adaptively adjusting dimension of power transistor are described. The duty cycle of the signal when the control mode converts can be gained accurately by using ratios of currents and capacitances, and an optimal dimension of power transistor is derived with different loads. The converter is designed by 0.35 µm standard CMOS technology. Simulation results indicate that the converter starts work at 0.8 V input voltage. Combined with synchronized rectification, the transfer efficiency is higher than 90% with full load range, and achieves 97.5% at rating output.

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Authors and Affiliations

  1. School of Electronic Information Engineering, Tianjin University, Tianjin, 300072, China

    Jing Gao  (高 静), Suying Yao  (姚素英), Jiangtao Xu  (徐江涛) & Zaifeng Shi  (史再峰)

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  1. Jing Gao  (高 静)
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  2. Suying Yao  (姚素英)
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  3. Jiangtao Xu  (徐江涛)
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  4. Zaifeng Shi  (史再峰)
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Corresponding author

Correspondence to Jing Gao  (高 静).

Additional information

Supported by National Youth Science Foundation of China(No.60806010).

GAO Jing, born in 1979, female, Dr, lecturer.

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Gao, J., Yao, S., Xu, J. et al. Design of a high efficiency boost DC-DC converter. Trans. Tianjin Univ. 15, 350–354 (2009). https://doi.org/10.1007/s12209-009-0061-y

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  • DOI: https://doi.org/10.1007/s12209-009-0061-y

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