Abstract
Leakage power analysis (LPA) attacks aim at finding the secret key of a cryptographic device from measurements of its static (leakage) power. This novel power analysis attacks take advantage of the dependence of the leakage power of complementary metal oxide semiconductor (CMOS) integrated circuits on the data they process. This paper proposes symmetric dual-rail logic (SDRL), a standard cell LPA attack countermeasure that theoretically resists the LPA attacks. The technique combines standard building blocks to make new compound standard cells, which are close to constant leakage power consumption. Experiment results show SDRL is a promising approach to implement an LPA-resistant crypto processor.
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Foundation item: the Software and Integrated Circuit Industries Development Foundation of Shanghai (No. 12Z116010001)
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Zhu, Nh., Zhou, Yj. & Liu, Hm. A standard cell-based leakage power analysis attack countermeasure using symmetric dual-rail logic. J. Shanghai Jiaotong Univ. (Sci.) 19, 169–172 (2014). https://doi.org/10.1007/s12204-014-1486-6
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DOI: https://doi.org/10.1007/s12204-014-1486-6
Key words
- correlation power analysis
- cryptograph
- differential power analysis
- leakage power analysis (LPA)
- power analysis
- simple power analysis