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An efficient and novel FDTD method based performance investigation in high-speed current-mode signaling SWCNT bundle interconnect

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Abstract

Carbon nanotube (CNT) has emerged as the most extensively researched area in nanoscience and amongst the frontrunners in co-triggering the nanotechnology revolution. Single-wall CNT (SWCNT) bundle is a part of CNT family and has been proposed as the future nano-wires in integrated circuits. The present paper analyzes the performance of SWCNT bundle interconnect with high-speed current-mode signaling (CMS) scheme using efficient finite-difference time-domain (FDTD) method. For the first time, FDTD based method is explored for modeling CMS SWCNT bundle interconnect incorporating practical CMOS driver gate. The CMOS gate is characterized by nth power-law model. The stability of FDTD method is ascertained by Courant condition. The proposed FDTD based method is efficient and can be used for performance analyses of future nano-wire SWCNT bundle as well as conventional copper interconnects. At the same time, this method is applicable for both traditional full-voltage swing voltage-mode signaling (VMS) and remarkable low-voltage swing CMS schemes. The various analyses in the paper reveal that CMS SWCNT bundle interconnect has higher edge over CMS copper interconnect in terms of smaller delay, lesser crosstalk induced delay and noise. The proposed analytical FDTD based method is validated using Tanner-SPICE EDA simulation tool. The maximum error between the FDTD and SPICE for the transient response in CMS SWCNT bundle interconnect for 32 nm technology node is within 3%.

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Abbreviations

∆t :

infinitesimal small time step

∆z :

infinitesimal small distance

C c :

coupling capacitance per unit length

C d :

drain diffusion capacitance

C dis :

distributed capacitance

C e :

electrostatic capacitance per unit length

C L :

load capacitance

C m :

gate-drain coupling capacitance

C q :

quantum capacitance per unit length

d :

diameter of monolayer SWCNT

e :

charge on electron

h :

Planck’s constant

h g :

height above ground plane

I :

current

i, j :

positive integer values

int :

integer value

l :

length of interconnect

L dis :

distributed inductance

L k :

kinetic inductance per unit length

L m :

magnetic inductance per unit length

M :

mutual inductance

N :

total number of SWCNTs in a bundle

N t :

number of SWCNTs along the thickness of SWCNT bundle interconnect

N w :

number of SWCNTs along the width of SWCNT bundle interconnect

Pm :

metallic ratio

Rc :

contact resistance

R dis :

distributed resistance

R L :

load resistance

R lump :

lumped resistance

Rq :

quantum resistance

s :

distance between two parallel SWCNT bundle interconnect

t :

thickness of SWCNT bundle interconnect

T :

room temperature

t :

time

V :

voltage

v f :

Fermi velocity

w :

width of SWCNT bundle interconnect

x :

inter-SWCNT distance

y :

center-to-center distance between SWCNTs facing each other in a two parallel SWCNT bundle interconnects

z :

position

α :

parameter for determining interconnect material

β :

parameter for determining signaling scheme

λ :

mean free path

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Author information

Authors and Affiliations

  1. VLSI and Embedded Systems Research Group, Dhirubhai Ambani Institute of Information and Communication Technology (DA-IICT), Ganghinagar, 382 007, India

    Yash Agrawal

  2. Department of Electronics and Communication Engineering, Vidya Jyoti Institute of Technology, Hyderabad, 500 075, India

    M Girish

  3. Department of Electronics and Communication Engineering, National Institute of Technology Hamirpur, Hamirpur, 177 005, Himachal Pradesh, India

    Rajeevan Chandel

Authors
  1. Yash Agrawal
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  2. M Girish
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  3. Rajeevan Chandel
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Correspondence to Yash Agrawal.

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Agrawal, Y., Girish, M. & Chandel, R. An efficient and novel FDTD method based performance investigation in high-speed current-mode signaling SWCNT bundle interconnect. Sādhanā 43, 175 (2018). https://doi.org/10.1007/s12046-018-0957-0

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