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Security enhancement of arbiter-based physical unclonable function on FPGA

  • Security of Network and Trust Computation
  • Published:
Wuhan University Journal of Natural Sciences

Abstract

In order to reduce physical unclonable function (PUF) response instability and imbalance caused by the metastability and the bias of arbiter, this paper uses an improved balanced D flip-plop (DFF) based on the unbalanced DFF to reduce the bias in response output and enhances the security of PUF by adopting two balanced DFFs in series. The experimental results show that two cascaded balanced DFFs improve the stability of the DFF, and the output of two balanced DFFs is more reliable. The entropy of output is fixed at 98.7%.

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Author information

Authors and Affiliations

  1. Key Laboratory of Aerospace Information Security and Trusted Computing Ministry of Education, Wuhan University, Wuhan 430072, Hubei, China

    Jun Wang, Shubo Liu, Xingxing Xiong & Cai Liang

  2. School of Computer, Wuhan University, Wuhan 430072, Hubei, China

    Jun Wang, Shubo Liu, Xingxing Xiong & Cai Liang

Authors
  1. Jun Wang
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  2. Shubo Liu
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  3. Xingxing Xiong
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  4. Cai Liang
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Corresponding author

Correspondence to Shubo Liu.

Additional information

Foundation item: Supported by the National Natural Science Foundation of China (41371402) and the Fundamental Research Funds for the Central Universities (2015211020201)

Biography: WANG Jun, male, Ph.D. candidate, research direction: information security and privacy in wireless / mobile networks.

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Wang, J., Liu, S., Xiong, X. et al. Security enhancement of arbiter-based physical unclonable function on FPGA. Wuhan Univ. J. Nat. Sci. 22, 127–133 (2017). https://doi.org/10.1007/s11859-017-1225-6

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  • DOI: https://doi.org/10.1007/s11859-017-1225-6

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