Abstract
Silicon and sapphire are common substrates for AlN, InGaN, and GaN thin films in several applications such as photovoltaic and light-embedded diodes. Threading dislocations are generated at interfaces between III-nitride (III-N) layers and these substrates because of large lattice and thermal expansion coefficient (TEC) mismatches. These dislocations penetrate the top surface of III-N layers to relax the system by forming V-pit defects. This work presents a thermodynamics-based model to study V-pit formation and growth in InGaN/GaN epilayers on either silicon or sapphire substrates. The model calculates the evolution of V-pit defects in thin films through the energy balance between the strain energy in the III-N layer, dislocation deterioration energy to form new V-pits, and V-pit facet energies that result because of facet formations. The impact of different lattice and TEC mismatches as well as a novel approach, the embedded void approach, on V-pit nucleation and growth is also investigated.
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The support from the Young Investigators Research Grant (No. YIRG05) at the British University in Egypt and the Research Grant from the Academy of Scientific Research & Technology (ASRT) are greatly appreciated.
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Khafagy, K.H., Hatem, T.M. & Bedair, S.M. Thermodynamics Models for V-pit Nucleation and Growth in III-Nitride on Silicon. JOM 73, 293–298 (2021). https://doi.org/10.1007/s11837-020-04421-z
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DOI: https://doi.org/10.1007/s11837-020-04421-z