Abstract
The coding gains including self-gain, mutual-gain and their variations for coding memory are defined, and the formulas for computing the gains are derived. The coding gains, used as the criteria, will be enable us to select an efficient code for memory system design quantitatively. Finally, the numerical results of some examples are analysed and discussed.
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References
E. Fujiwara, D. K. Pradhan, Error-control coding in computers, Computers, 23(1990)7, 63–72.
C. L. Chen, M. Y. Hsiao, Error-correcting codes for semiconductor memory applicaions: a state-of-the art review, IBM J Res. Develop., 28(1984)2, 120–134.
C. H. Stapper, et al., High reliability fault-tolerant 16-Mbit memory chip, IEEE Trans. on Reliability, R-42(1993)4, 596–603.
G. -C. Yang, Reliability of semiconductor RAMs with soft-error scrubbing techniques, IEE Proc.-E, 142(1995)5, 337–344.
D. C. Wilkinson, National oceanic and atmospheric administration’s spacecraft anomaly data base and examples of solar activity affecting spacecraft, Journal of Spacecraft and Rockets, 31(1994)2, 160–165.
C. I. Underwood, et al., Observations of single-event upsets in no-hardened high-density SRAMs in sunsynchronous orbit, IEEE Trans on Nuclear Science, NS-39(1992)6, 1817–1827.
D. B. Newman, S. J. Hutton, Study of Reed-solomon correction for mass memory, Journal of the British Interplanetary Society, 45(1992)3, 121–126.
Sui Houtang, Increasing reliability of semiconductor memory using a single error correcting code, The Paper for the Sixth Space Exploration Conference, Zhangjiajie, Hunan, 11, 1992, (In chinese).
J. W. Schwarty, J. K. Wolf, A systematic (12.8) code for correcting single errors and detecting adjacent error, IEEE Trans. on Computers, C-39(1990)1, 1403–1404.
W. K. S. Walker, C. E. Sundberg, C. J. Black, A reliable spaceborne memory with single error and erasure correction scheme, IEEE Trans. on Computers, C-28(1979)7, 493–500.
S. Karp, B. K. Gilbert, Digital system design in the presence of single event upsets, IEEE Trans. on AES, AES-29(1993)2, 310–316.
J. B. While, Fault-tolerant memory system architecture for radiation induced errors, IEEE Trans. on AES, AES-18(1982)1, 39–47.
P. M. O’Nell, G. D. Badhwar, Single event upsets for space shuttle flights of new general purpose computer memory devices, IEEE Trans. on NS, NS-41(1994)5, 1755–1764.
Sui-houtang, Systematic (16,8) code error distribution and characteristic analysis, The Proceedings of the Seventh Space Exploration Conference, 265–268, Zhoushan, Zhejiang: 10, 1994. (in Chinese).
B. S. Dhillon, Reliability in Computer Systm Design, Norwood, NJ: Ablox Publishing Corporation, 1987, 31–51.
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Sui, H. The coding gains of memories. J. of Electron.(China) 15, 357–364 (1998). https://doi.org/10.1007/s11767-998-0010-2
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DOI: https://doi.org/10.1007/s11767-998-0010-2