Abstract
Multi-Threshold CMOS (MTCMOS) is an effective technique for controlling leakage power with low delay overhead. However the large magnitude of ground bouncing noise induced by the sleep to active mode transition may cause signal integrity problem in MTCMOS circuits. We propose a methodology for reducing ground bouncing noise under the wake-up delay constraint. An improved two-stage parallel power gating structure that can suppress the ground bouncing noise through turn on sets of sleep transistors consecutively is proposed. The size of each sleep transistor is optimized by a novel sizing algorithm based on a simple discharging model. Simulation results show that the proposed techniques achieve at least 23% improvement in the product of the peak amplitude of ground bouncing noise and the wake-up time when compared with other existing techniques.
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Supported by the National Natural Science Foundation of China (No. 6087001).
Communication author: Tian Xi, born in 1971, male, Ph.D. candidate.
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Tian, X., Wang, Y. & Dong, Z. Ground bouncing noise reduction technique considering wake-up delay in MTCMOS circuits. J. Electron.(China) 28, 596–601 (2011). https://doi.org/10.1007/s11767-012-0706-1
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DOI: https://doi.org/10.1007/s11767-012-0706-1