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Fault detection test set for testable realizations of logic functions with ESOP expressions

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Journal of Electronics (China)

Abstract

The circuit testable realization and its fault detection for logic functions with ESOP (EXOR-Sum-Of-Products) expressions are studied. First of all, for the testable realization by using XOR gate cascade, a test set with 2n + m + 1 vectors for the detections of AND bridging faults and a test set with 2n + m vectors for the detections of OR bridging faults are presented. Secondly, for the testable realization by using XOR gate tree, a test set with 2n + m vectors for the detections of AND bridging faults and a test set with 3n + m + 1 vectors for the detections of OR bridging faults are presented. Finally, a single fault test set with n + 5 vectors for the XOR gate tree realization is presented. Where n is the number of input variables and m is the number of product terms in a logic function.

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Correspondence to Pan Zhongliang Ph.D..

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Supported by the National Natural Science Foundation of China (No.60006002), and the Education Department of Guangdong Province of China (No.02019).

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Pan, Z., Chen, G. Fault detection test set for testable realizations of logic functions with ESOP expressions. J. of Electron.(China) 24, 238–244 (2007). https://doi.org/10.1007/s11767-005-0224-5

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  • DOI: https://doi.org/10.1007/s11767-005-0224-5

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