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Si/SiGe PMOSFET using P+ implantation technology

  • Published:
Journal of Electronics (China)

Abstract

Si/SiGe P-channel Metal-Oxide-Semiconductor Field Effect Transistor (PMOSFET) using P+ (phosphor ion) implantation technology is successfully fabricated. P+ implantation into SiGe virtual substrate induces a narrow defect region slightly below the SiGe/Si interface, which gives rise to strongly enhanced strain relaxation of SiGe virtual substrate. X-Ray Diffraction (XRD) tests show that the degree of relaxation of SiGe layer is 96% while 85% before implantation. After annealed, the sample appeared free of Threading Dislocation densities (TDs) within the SiGe layer to the limit of Transmission Electron Microscopy (TEM) analysis. Atomic Force Microscope (AFM) test of strained Si channel surface shows that Root Mean Square (RMS) is 1.1nm. The Direct Current (DC) characters measured by HP 4155B indicate that the maximum saturated transconductance is twice bigger than that of bulk Si PMOSFET.

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Authors and Affiliations

  1. Department of Microelectronics and Solid-State Electronics, University of Electronic Science and Technology of China, Chengdu, 610054, China

    Tan Jing (female, master), Li Jingchun, Xu Wanjing, Zhang Jing, Tan Kaizhou & Yang Mohua

  2. National key Laboratory of Analog IC, Chongqing, 400060, China

    Xu Wanjing, Zhang Jing & Tan Kaizhou

Authors
  1. Tan Jing
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  2. Li Jingchun
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  3. Xu Wanjing
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  4. Zhang Jing
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  5. Tan Kaizhou
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  6. Yang Mohua
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Corresponding author

Correspondence to Tan Jing.

Additional information

Supported by the Funds of National Key Laboratory of Analog IC (2000JS09.3.1.DZ02).

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Tan, J., Li, J., Xu, W. et al. Si/SiGe PMOSFET using P+ implantation technology. J. of Electron.(China) 24, 100–103 (2007). https://doi.org/10.1007/s11767-005-0129-3

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  • DOI: https://doi.org/10.1007/s11767-005-0129-3

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