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Searching for complete set of free resource rectangles on FPGA area based on CPTR

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Journal of Shanghai University (English Edition)

Abstract

As a coprocessor, field-programmable gate array (FPGA) is the hardware computing processor accelerating the computing capacity of computers. To efficiently manage the hardware free resources for the placing of tasks on FPGA and take full advantage of the partially reconfigurable units, good utilization of chip resources is an important and necessary work. In this paper, a new method is proposed to find the complete set of maximal free resource rectangles based on the cross point of edge lines of running tasks on FPGA area, and the prove process is provided to make sure the correctness of this method.

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Authors and Affiliations

  1. School of Computer Engineering and Science, Shanghai University, Shanghai, 200072, P. R. China

    Ya-hui Chai  (柴亚辉), Wen-feng Shen  (沈文枫), Wei-min Xu  (俆炜民) & Yan-heng Zheng  (郑衍衡)

  2. School of Information Engineering, East China Jiaotong University, Nanchang, 330013, P. R. China

    Ya-hui Chai  (柴亚辉) & Jue-fu Liu  (刘觉夫)

Authors
  1. Ya-hui Chai  (柴亚辉)
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  2. Wen-feng Shen  (沈文枫)
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  3. Wei-min Xu  (俆炜民)
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  4. Jue-fu Liu  (刘觉夫)
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  5. Yan-heng Zheng  (郑衍衡)
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Corresponding author

Correspondence to Wei-min Xu  (俆炜民).

Additional information

Project supported by the Shanghai Leading Academic Discipline Project (Grant No.J50103), the Natural Science Foundation of Jiangxi Province (Grant No.2010GZS0031), and the Science Technology Project of Jiangxi Province (Grant No.2010BGB00604)

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Chai, Yh., Shen, Wf., Xu, Wm. et al. Searching for complete set of free resource rectangles on FPGA area based on CPTR. J. Shanghai Univ.(Engl. Ed.) 15, 391–396 (2011). https://doi.org/10.1007/s11741-011-0757-2

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  • DOI: https://doi.org/10.1007/s11741-011-0757-2

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