The continuous rise in heat dissipation of integrated circuits necessitates advanced thermal solutions to ensure system reliability and efficiency. Thermoelectric coolers are among the most promising techniques for dealing with localized on-chip hot spots. This study focuses on establishing a holistic optimization methodology for such thermoelectric coolers, in which a thermoelectric element’s thickness and the electrical current are optimized to minimize source temperature with respect to ambient, when the thermal and electrical parasitic effects are considered. It is found that when element thickness and electrical current are optimized for a given system architecture, a “heat flux vs. temperature difference” Pareto frontier curve is obtained, indicating that there is an optimum thickness and a corresponding optimum current that maximize the achievable temperature reduction while removing a particular heat flux. This methodology also provides the possible system level ΔT’s that can be achieved for a range of heat fluxes, defining the upper limits of thermoelectric cooling for that architecture. In this study, use was made of an extensive analytical model, which was verified using commercially available finite element analysis software. Through the optimization process, 3 pairs of master curves were generated, which were then used to compose the Pareto frontier for any given system architecture. Finally, a case study was performed to provide an in-depth demonstration of the optimization procedure for an example application.
This is a preview of subscription content, access via your institution.
Buy single article
Instant access to the full article PDF.
Tax calculation will be finalised during checkout.
Yang B, Wang P. Thermoelectric microcoolers. In: Bar-Cohen A ed. Encyclopedia of Thermal Packaging. Singapore: World Scientific Publishing Company, 2012
Tan G, Zhao D. A review of thermoelectric cooling: materials, modeling and applications. Applied Thermal Engineering, 2014, 66 (1–2): 15–24
Simons R E, Chu R C. Applications of thermoelectric cooling to electronic equipment: a review and analysis. In: Proceedings of the 16th IEEE Semi-Therm Symposium, 2000, 1–9
Yang B, Wang P, Bar-Cohen A. Thermoelectric mini-contact cooler for hot-spot removal in high power devices. Proceedings of the 56th Electronic Components and Technology Conference, 2006, 1–6
Wang P, Yang B, Bar-Cohen A. Mini-contact enhanced thermoelectric coolers for on chip hot spot cooling. Heat Transfer Engineering, 2009, 30(9): 736–743
Yuruker S U, Bae D, Mandel R K, Yang B, McCluskey P, Bar-Cohen A, Ohadi M. Integration of micro-contact enhanced thermoelectric cooler with a feeds manifold-microchannel system for cooling of high flux electronics. Proceedings of the16th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm), 2017, 711–718
Bulman G, Barletta P, Lewis J, Baldasaro N, Manno M, Bar-Cohen A, Yang B. Superlattice-based thin-film thermoelectric modules with high cooling fluxes. Nature Communications, 2016, 7: 10302
Snyder G J, Soto M, Alley R, Koester D, Conner B. Hot spot cooling using embedded thermoelectric coolers. 22nd Annual IEEE Semiconductor Thermal Measurement and Management Symposium, 2006, 135–143
Ranjan R, Turney J E, Lents C E. Design of high packing fraction thermoelectric modules for high heat flux cooling. ASME 2013 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems, 2013, IPACK2013-73073
Chowdhury I, Prasher R, Lofgreen K, Chrysler G, Narasimhan S, Mahajan R, Koester D, Alley R, Venkatasubramanian R. On-chip cooling by superlattice-based thin-film thermoelectrics. Nature Nanotechnology, 2009, 4(4): 235–238
Gupta M P, Sayer M H, Mukhopadhyay S, Kumar S. Ultrathin thermoelectric devices for on-chip peltier cooling. IEEE Transactions on Components, Packaging, and Manufacturing Technology, 2011, 1(9): 1395–1405
Fraisse G, Lazard M, Goupil C, Serrat J Y. Study of a thermoelement’s behaviour through a modelling based on electrical analogy. International Journal of Heat and Mass Transfer, 2010, 53 (17–18): 3503–3512
Alam H, Ramakrishna S. A review on the enhancement of figure of merit from bulk to nano-thermoelectric materials. Nano Energy, 2013, 2(2): 190–212
Solbrekken G L, Yazawa K, Bar-Cohen A. Chip level refrigeration of portable electronic equipment using thermoelectric devices. In: Proceedings of InterPack’03. Maui, USA, 2003
Taylor R A, Solbrekken G L. Comprehensive system-level optimization of thermoelectric devices for electronic cooling applications. IEEE Transactions on Components and Packaging Technologies, 2008, 31(1): 23–31
Yamashita O, Ochi T, Odahara H. Effect of the cooling rate on the thermoelectric properties of p-type (Bi0.25Sb0.75)2Te3 and n-type Bi2(Te0.94Se0.06)3 after melting in the bismuth–telluride system. Materials Research Bulletin, 2009, 44(6): 1352–1359
Kim Y, Yoon G, Park S. Direct contact resistance evaluation of thermoelectric legs. Experimental Mechanics, 2016, 56(5): 861–869
Sharar D, Jankowski N R, Morgan B. Review of two-phase electronics cooling for army vehicle applications. ARL-TR-5323. 2010
Bar-Cohen A, Arik M, Ohadi M. Direct liquid cooling of high flux micro and nano electronic components. Proceedings of the IEEE, 2006, 94(8): 1549–1570
Lee J, Mudawar I. Two-phase flow in high-heat-flux micro-channel heat sink for refrigeration cooling applications: Part II—heat transfer characteristics. International Journal of Heat and Mass Transfer, 2005, 48(5): 941–955
Lee J, Mudawar I. Low-temperature two-phase microchannel cooling for high-heat-flux thermal management of defense electronics. IEEE Transactions on Components and Packaging Technologies, 2009, 32(2): 453–465
Agostini B, Fabbri M, Park J E, Wojtan L, Thome J R, Michel B. State of the art of high heat flux cooling technologies. Heat Transfer Engineering, 2007, 28(4): 258–281
Lee S, Song S, Au V, Moran K P. Constriction/spreading resistance model for electronics packaging. ASME/JSME Thermal Engineering Conference, 1995, 4: 199–206
Atarashi T, Tanaka T, Tsubaki S, Hirasawa S. Calculation method for forced-air convection cooling heat transfer coefficient of multiple rows of memory cards. Journal of Electronics Cooling and Thermal Control, 2014, 4(3): 70–77
The authors acknowledge the financial support from Darpa Matrix program on thermoelectrics.
About this article
Cite this article
Yuruker, S.U., Fish, M.C., Yang, Z. et al. System-level Pareto frontiers for on-chip thermoelectric coolers. Front. Energy 12, 109–120 (2018). https://doi.org/10.1007/s11708-018-0540-8
- thermoelectric cooling
- thermal management
- high flux electronics