Skip to main content
SpringerLink
Log in

Model for Predicting the Threshold Voltage of Tunnel Field-Effect Transistors Using Linear Regression

  • Brief Communication
  • Published:
Journal of Electronic Materials Aims and scope Submit manuscript

Abstract

A linear regression-based method for extracting the threshold voltage of tunnel field-effect transistors (TFETs) is presented. The minimum tunneling width at the threshold voltage of a TFET is expressed as a linear function of tunneling widths corresponding to gate voltages. The regression is carried out using known simulated TFETs and verified on unknown TFETs, achieving an R2 value of 96.50%. The model is compared with and verified against methods and devices reported in literature, confirming that it is effective for predicting the threshold voltage.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Fig. 1
Fig. 2

References

  1. A. Chaudhry, and M.J. Kumar, IEEE Trans. Device Mater. Reliab. 4, 99 (2004).

    Article  Google Scholar 

  2. M.V. Fischetti, S.E. Laux, and D.J. DiMaria, Appl. Surf. Sci. 39, 578 (1989).

    Article  CAS  Google Scholar 

  3. K.K. Young, IEEE Trans. Electron Devices 36, 399 (1989).

    Article  Google Scholar 

  4. A.M. Ionescu, and H. Riel, Nature 479, 329 (2011).

    Article  CAS  Google Scholar 

  5. A. Chattopadhyay, A. Mallik, and Y. Omura, Superlatt. Microstruct. 82, 415 (2015).

    Article  CAS  Google Scholar 

  6. R. Goswami, B. Bhowmick, in Proceedings of 2014 Int. Conf. Green Computing Comm. Electrical Eng. (ICGCCEE) (2014), p. 1.

  7. D.B. Abdi, and M.J. Kumar, IEEE Electron Device Lett. 35, 1170 (2014).

    Article  CAS  Google Scholar 

  8. P. Sharma, J. Madan, R. Pandey, and R. Sharma, J. Electron. Mater. 50, 138 (2021).

    Article  CAS  Google Scholar 

  9. F. Horst, A. Farokhnejad, Q. Zhao, B. Iñíguez, and A. Kloes, IEEE Trans. Electron Devices 66, 132 (2019).

    Article  CAS  Google Scholar 

  10. R. Goswami, and B. Bhowmick, IEEE Trans. Electron Devices 64, 45 (2017).

    Article  Google Scholar 

  11. R. Goswami, and B. Bhowmick, IEEE Trans. Nanotechnol. 16, 90 (2017).

    CAS  Google Scholar 

  12. K. Boucart, and A.M. Ionescu, IEEE Trans. Electron Devices 54, 1725 (2007).

    Article  CAS  Google Scholar 

  13. S. Chander, and S. Baishya, IEEE Electron Device Lett. 36, 714 (2015).

    Article  CAS  Google Scholar 

  14. TCAD Sentaurus Device User’s Manual, Mountain View (USA: CA, 2010).

    Google Scholar 

  15. A. Ortiz-Conde, F.J. Garcı́aSánchez, J.J. Liou, A. Cerdeira, M. Estrada, Y. Yue, Microelec. Reliab. 42, 583 (2002)

  16. S. Safa, S.L. Noor, and Z.R. Khan, IEEE Trans. Electron Devices 64, 1449 (2017).

    Article  Google Scholar 

  17. D.B. Abdi, and M.J. Kumar, IEEE Trans. Electron Devices 63, 3663 (2016).

    Article  CAS  Google Scholar 

  18. S. Dash, and G.P. Mishra, Adv. Nat. Sci: Nanosci. Nanotechnol. 6, 035005 (2015).

    Google Scholar 

  19. K. Boucart, A. M. Ionescu, Threshold voltage in tunnel FETs: physical definition, extraction, scaling and impact on IC design, ESSDERC 2007 – 37th Eur. Solid State Device Res. Conf., pp. 299-302 (2007).

  20. A. Biswas, S.S. Dan, C.L. Royer, W. Grabinski, and A.M. Ionescu, Microelectron. Eng. 98, 334 (2012).

    Article  CAS  Google Scholar 

  21. F. Mayer, C. Le Royer, J.-F. Damlencourt, K. Romanjek, F. Andrieu, C. Tabone, B. Previtali, S. Deleonibus, Impact of SOI, Si1-xGexOI and GeOI substrates on CMOS compatible Tunnel FET performance, 2008 IEEE Int. Electron Devices Meeting, pp. 1-5 (2008).

Download references

Acknowledgments

The authors acknowledge the device simulation laboratory of KIIT Deemed to be University. The authors acknowledge the support by SERB, Govt. of India, File No. SRG/2019/000660 dated 26 November, 2019.

Author information

Authors and Affiliations

  1. School of Electronics, Kalinga Institute of Industrial Technology Deemed to be University, Bhubaneswar, 751024, India

    Vikas Kumar & Manoj Kumar Parida

  2. Department of Electronics and Communication Engineering, School of Engineering, Tezpur University, Napaam, Assam, 784028, India

    Rupam Goswami & Deepjyoti Deb

Authors
  1. Vikas Kumar
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Manoj Kumar Parida
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Rupam Goswami
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. Deepjyoti Deb
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Rupam Goswami.

Ethics declarations

Conflict of interest

The authors declare that they have no conflicts of interest.

Additional information

Publisher’s Note

Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Kumar, V., Parida, M.K., Goswami, R. et al. Model for Predicting the Threshold Voltage of Tunnel Field-Effect Transistors Using Linear Regression. J. Electron. Mater. 50, 6015–6019 (2021). https://doi.org/10.1007/s11664-021-09189-9

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s11664-021-09189-9

Keywords

Search

Navigation