Amended Electric Field Distribution: A Reliable Technique for Electrical Performance Improvement in Nano scale SOI MOSFETs

Abstract

To achieve reliable transistors, we propose a new silicon-on-insulator (SOI) metal–oxide–semiconductor field-effect transistor (MOSFET) with an amended electric field in the channel for improved electrical and thermal performance, with an emphasis on current leakage improvement. The amended electric field leads to lower electric field crowding and thereby we assume enhanced reliability, leakage current, gate-induced drain leakage (GIDL), and electron temperature. To modify the electric field distribution, an additional rectangular metal region (RMR) is utilized in the buried oxide of the SOI MOSFET. The location and dimensions of the RMR have been carefully optimized to achieve the best results. The electrical, thermal, and radiofrequency characteristics of the proposed structure were analyzed using two-dimensional (2-D) numerical simulations and compared with the characteristics of the conventional, fully depleted SOI MOSFET (C-SOI). Also, critical short-channel effects (SCEs) such as threshold voltage, drain-induced barrier lowering (DIBL), subthreshold slope degradation, hot-carrier effect, GIDL, and leakage power consumption are improved. According to the results obtained, the proposed nano SOI MOSFET is a reliable device, especially for use in low-power and high-temperature applications.