Journal of Electronic Materials

, Volume 32, Issue 1, pp 9–17 | Cite as

Electroless Cu deposition process on TiN for ULSI interconnect fabrication via Pd/Sn colloid activation

  • H. P. Fong
  • Y. Wu
  • Y. Y. Wang
  • C. C. Wan
Regular Issue Paper


In this study, (100)-orientation silicon wafer coated with TiN barrier is catalyzed by a Pd/Sn colloid, which serves as an activator for electroless copper deposition. After activation, electroless deposition of Cu occurs on the catalytic surface. The coverage of the Cu deposit reaches 100% and the adsorptive amount of Pd is greatly increased by the conditioning process. The correlation between deposition rate, resistivity, morphology, crystal structure, and composition of the deposit when varying the temperature of the plating bath is discussed. The deposition rate of Cu is monitored by both the electrochemical method and the profilometer (α-step), while the other properties of the deposit are measured by four-point probe, scanning electron microscopy (SEM), x-ray diffraction (XRD), and Auger electron microscopy (AES). Deposition at 70°C is favorable due to the higher deposition rate, lower resistivity, less impurities, and more preferred orientation in the crystal structure than that at lower temperature. Problems regarding adhesion and high resistivity can be greatly mitigated via 400°C thermal annealing. The resistivity of Cu can be reduced to 2.2 μΩcm. Moreover, trenches of 1 µm and 0.25 µm on patterned wafer have been successfully filled by electroless deposition of Cu with the aid of surfactant C12.

Key words

Electroless Cu Pd colloid ULSI 


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  1. 1.
    J.D. Plummer, M.D. Deal, and P.B. Griffin, Silicon VLSI Technology (Englewood Cliffs, NJ: Prentice-Hall, Inc., 2000), pp. 570–572.Google Scholar
  2. 2.
    P.C. Andricacos, Interface 8, 32 (1999).Google Scholar
  3. 3.
    P.C. Andricacos, C. Uzoh, J.O. Dukovic, J. Horkans, and H. Deligianni, IBM J. Res. Develop. 42, 567 (1998).CrossRefGoogle Scholar
  4. 4.
    V.M. Dubin, C.H. Ting, and R. Cheung, VMIC Conf. (1997).Google Scholar
  5. 5.
    M.J. Desilva, V. Dubin, and Y. Shcham-Diamand, J. Mater. Res. 11, 607 (1996).Google Scholar
  6. 6.
    B. Zhao and P.K. Vasudev, J. Mater. Res. 11, 179 (1996).Google Scholar
  7. 7.
    V.M. Dubin and Y. Shcham-Diamand, J. Electrochem. Soc. 144, 898 (1997).CrossRefGoogle Scholar
  8. 8.
    V.M. Dubin, J. Electrochem. Soc. 139, 633 (1992).CrossRefGoogle Scholar
  9. 9.
    H.H. Hsu, K.H. Lin, S.J. Lin, and J.W. Yeh, J. Electrochem. Soc. 148, C47 (2001).Google Scholar
  10. 10.
    H.H. Hsu, C.W. Ting, S.J. Lin, and J.W. Yeh, J. Electrochem. Soc. 149, C143 (2002).Google Scholar
  11. 11.
    E.D. D’Ottavio, U.S. patent 3,532,518 (1970); U.S. patent 3,650,913 (1972).Google Scholar
  12. 12.
    M.W. Jawitz, Printed Circuit Board Materials Handbook (New York, NY: McGraw-Hill Companies, Inc., 1997), pp. 23.1–23.5.Google Scholar
  13. 13.
    T. Osaka, H. Takematsu, and K Nihei, J. Electrochem. Soc. 148, C162 (1980).Google Scholar
  14. 14.
    C.S. Yang, C.C. Chen, Y.Y. Wang, and C.C. Wan, J. Electrochem. Soc. 143, 3521 (1996).CrossRefGoogle Scholar
  15. 15.
    Y. Shcham-Diamand, V.M. Dubin, and M. Angyal, Thin Solid Film 262, 93 (1995).CrossRefGoogle Scholar

Copyright information

© TMS-The Minerals, Metals and Materials Society 2003

Authors and Affiliations

  • H. P. Fong
    • 1
  • Y. Wu
    • 1
  • Y. Y. Wang
    • 1
  • C. C. Wan
    • 1
  1. 1.Department of Chemical EngineeringNational Hsing-Hua UniversityHsinchuTaiwan

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