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A Strategy to Reduce the Peak Temperature of the Chip Working under Dynamic Power Using the Transient Cooling Effect of the Thin-Film Thermoelectric Cooler

  • Nano/Microscale Heat Conduction
  • Published:
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Abstract

The thin-film thermoelectric cooler (TEC) is a promising solid-state heat pump that can remove the high local heat flux of chips utilizing the Peltier effect. When an electric current pulse is applied to the thin-film TEC, the TEC can achieve an instantaneous lower temperature compared to that created by a steady current. In this paper, we developed a novel strategy to reduce the peak temperature of the chip working under dynamic power, thus making the semiconductor chip operate reliably and efficiently. A three-dimensional numerical model was built to study the transient cooling performance of the thin-film TEC on chips. The effects of parameters, such as the current pulse, the heat flux, the thermoelement length, the number of thermoelements, and the contact resistance on the performance of the thin-film TEC, were investigated. The results showed that when a current pulse of 0.6 A was applied to the thin-film TEC before the peak power of the chip, the peak temperature of the chip was reduced by more than 10°C, making the thin-film thermoelectric cooler a promising technology for the temperature control of modern chips with high peak powers.

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Abbreviations

c p :

specific heat of fluid at constant pressure/J·kg−1·K−1

E⃗ :

electric field/V·m−1

h :

convective heat transfer coefficient/W·m−2·K−1

I :

electric current/A

J⃗ :

current density/A·m−2

K :

thermal conductance of the thin-film TEC/W·K−1

k :

thermal conductivity of the thermoelectric material/W·m−1·K−1

Q c :

cooling capacity/W

Q h :

heating capacity/W

q⃗ :

heat flux/W·m−2

q 1 :

the heat flux of the chip during 0–0.3 s and 0.6–1 s/W·m−2

q 2 :

the heat flux of the chip during 0.3–0.6 s/W·m−2

R :

electrical resistance of the thin-film TEC/Ω

T :

temperature/°C

T c :

temperature of the chip substrate/°C

T h :

temperature of the heat sink/°C

T :

temperature gradient/K·m−1

T 1 :

peak temperatures of the chip substrate without a current pulse applied to the thin-film TEC/°C

T 2 :

peak temperatures of the chip substrate with a current pulse applied to the thin-film TEC/°C

W :

input electrical power of the thin-film TEC/W

α :

Seebeck coefficient/V·K−1

α pn :

Seebeck coefficient of the junction/V·K−1

γ :

electrical resistivity of the thermoelectric material/Ω·m

COP:

coefficient of performance

TE:

thermoelectric

TEC:

thermoelectric cooler

ZT:

figure of merit

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Acknowledgements

This research was supported by the National Natural Science Foundation of China (Grant No. 51778511), Natural Science Foundation of Hubei Province (Grant No. 2018CFA029), Key Research and Design Projects of Hubei Province (Grant No. 2020BAB129), Key Project of ESI Discipline Development of Wuhan University of Technology (Grant No. 2017001), and Scientific Research Foundation of Wuhan University of Technology (Nos. 40120237 and 40120551), and the Fundamental Research Funds for the Central Universities (WUT: 2021IVA037). The support to Dr. FANG Yueping from EU Horizon 2020 Marie Curie Global Fellowship (Grant No. 841183) was appreciated.

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Correspondence to Tingzhen Ming.

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Wu, Y., Chen, S., Gong, T. et al. A Strategy to Reduce the Peak Temperature of the Chip Working under Dynamic Power Using the Transient Cooling Effect of the Thin-Film Thermoelectric Cooler. J. Therm. Sci. 31, 1094–1105 (2022). https://doi.org/10.1007/s11630-022-1637-2

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  • DOI: https://doi.org/10.1007/s11630-022-1637-2

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