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A memristor-based circuit design of avoidance learning with time delay and its application

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Abstract

Currently, the research in memristor-based associative memory neural networks pays more attention to positive stimuli and lays less attention to negative stimuli. Negative stimuli are superior to positive stimuli in some ways, but lack the associated circuit implementation. In this paper, a memristor-based circuit design of avoidance learning with time delay is designed. The circuit can respond to a negative stimulus after initial avoidance learning and the effect of delay time between stimuli is considered. The realization of avoidance learning is confirmed in the PSPICE simulation results. In addition, an extended application circuit based on the memristor-based circuit design of avoidance learning with time delay is proposed. The application circuit is based on the advantage of negative stimuli is more difficult to forget than positive stimuli in associative memory. Based on the features of objects as input, the output of the circuit is used to achieve the function of avoidance learning. The application circuit provides more references for neural networks of automatic driving with further development.

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Acknowledgements

This work was supported in part by the National Natural Science Foundation of China under Grant 62276239 and 62272424, in part by Zhongyuan Talents Program under Grant ZYYCYU202012154, and in part by Henan Natural Science Foundation-Outstanding Youth Foundation under Grant 222300420095.

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Authors and Affiliations

  1. College of Electronic and Information Engineering, Zhengzhou University of Light Industry, Zhengzhou, 450002, China

    Junwei Sun, Haojie Wang, Yuanpeng Xu, Peng Liu & Yanfeng Wang

  2. Henan Key Lab of Information-Based Electrical Appliances, Zhengzhou University of Light Industry, Zhengzhou, 450002, China

    Junwei Sun, Haojie Wang, Yuanpeng Xu, Peng Liu & Yanfeng Wang

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  1. Junwei Sun
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  2. Haojie Wang
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Correspondence to Junwei Sun.

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Sun, J., Wang, H., Xu, Y. et al. A memristor-based circuit design of avoidance learning with time delay and its application. Cogn Neurodyn (2024). https://doi.org/10.1007/s11571-024-10173-2

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