Abstract
As a more recent option for low-complexity compression, the transform-based JPEG XR standard accepts an extended range of input formats and provides good low-loss compression. Based on the performance in software of the JPEG XR compression to process remote-sensing images and foreseeing applications onboard small earth-observation satellites, the JPEG XR algorithm was implemented and evaluated in FPGA. The VHDL code was developed and evaluated in two parts, the transform/quantization/prediction and the DC/LP/HP encoding, which were then merged into the complete JPEG XR description. The results of the real-time evaluation were compared to the predictive-differential JPEG LS compression, in a similar hardware test setup, and also to other JPEG XR hardware implementations, and showed up a good trade-off between a throughput of 16 Mpix/s and a power consumption of about 180 mW, at a 50 MHz clock frequency. Better results were estimated for a more recent FPGA version at a higher frequency.
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Lopes Filho, A., d’Amore, R. FPGA implementation of the JPEG XR for onboard earth-observation applications. J Real-Time Image Proc 18, 2037–2048 (2021). https://doi.org/10.1007/s11554-021-01078-y
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DOI: https://doi.org/10.1007/s11554-021-01078-y