A dynamically reconfigurable architecture system for time-varying image constraints (DRASTIC) for motion JPEG


We propose a dynamically reconfigurable system for time-varying image constraints (DRASTIC) for applications in video communications. DRASTIC defines a framework for both joint and independent optimization of dynamic power, image quality, and bitrate subject to different constraint scenarios. We demonstrate DRASTIC for intra-mode video encoding for MJPEG. However, since the DCT is critical component of most video coding standards, our approach can be extended to modern standards such as AVC (H.264), and emerging standards such as HEVC (H.265), and VP9. Based on a hardware–software co-design approach, we define a family of scalable 2D DCT hardware modules that are jointly optimized with the quality factor (in software). We generate a total of 1,280 configurations of which 841 were found to be Pareto optimal. For full 2D DCT calculation, the results indicate that the proposed method is DRASTIC mode implementation at least as good or significantly better than any previously published implementation. A scalable, real-time controller is used for selecting an appropriate configuration so as to meet time-varying constraints. The real-time controller is shown to satisfy the constraints of different communications modes (e.g., minimum dynamic power, maximum image quality, etc.) as well as to adapt to mode changes. Empirically, we have found that the DRASTIC controller adapts to meet the new constraints within five video frames of a mode change. Overall, the proposed approach yields significant savings over the use of comparable static architectures.

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This material is based upon work supported by the National Science Foundation under NSF AWD CNS-1422031.

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Correspondence to Marios S. Pattichis.

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Jiang, Y., Pattichis, M.S. A dynamically reconfigurable architecture system for time-varying image constraints (DRASTIC) for motion JPEG. J Real-Time Image Proc 14, 395–411 (2018). https://doi.org/10.1007/s11554-014-0460-8

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  • FPGA
  • DCT
  • Zonal
  • Finite word length
  • Dynamic partial reconfiguration
  • Dynamically reconfigurable computing