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Modified stable Euler-number algorithm implementation for real-time image binarization

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Abstract

The stable Euler-number-based image binarization has been shown to give excellent visual results for images containing high amount of image noise. Being computationally expensive, its applications are limited mostly to general-purpose processors and in application specific integrated circuits. In this paper a modified stable Euler-number-based algorithm for image binarization is proposed and its real-time hardware implementation in a Field Programmable Gate Array with a pipelined architecture is presented. The proposed modifications to the algorithm facilitate hardware implementation. The end result is a design that out-performs known software implementations. The amount of noisy pixels introduced during the binarization process is also minimized. Despite the stable Euler-number-based image binarization being computationally expensive, our simulations show that the proposed architecture gives accurate results and this in real time and without consuming all chip resources.

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Authors and Affiliations

  1. Department of Electrical and Computer Engineering, Concordia University, 1515 St.Catherine West, S-EV005.139, Montreal, QC, H3G 2W1, Canada

    Naeem Abbasi, Jacques Athow & Aishy Amer

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  1. Naeem Abbasi
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  2. Jacques Athow
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  3. Aishy Amer
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Correspondence to Naeem Abbasi.

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Abbasi, N., Athow, J. & Amer, A. Modified stable Euler-number algorithm implementation for real-time image binarization. J Real-Time Image Proc 9, 31–45 (2014). https://doi.org/10.1007/s11554-012-0296-z

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