Parallel architecture for accelerating affine transform in high-speed imaging systems
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Affine transform is widely used in the high speed image processing systems. This transform plays an important role in various high speed applications like Optical quadrature microscopy (OQM), image stabilisation in digital camera and image registration etc. In these applications, transformations of image consume most of the execution time. Hence, for high speed imaging systems, acceleration of Affine transform is very much sought for. In this paper, the pipelined architecture implementation of a proposed inherent parallel algorithm for Affine transform has been presented. The acceleration of the image transformation will help in reducing the processing time of high speed imaging systems. The architecture is mapped in Field programmable gate array (FPGA) and the result shows that the proposed algorithm is almost 4 times faster than the conventional algorithm while retaining the image quality. Using the proposed algorithm, an image of size 1,920 × 1,080 can be transformed with a frame rate of 540 frames per second and the multiplane image synthesis for image stabilisation on the same digital image can be performed with a frame rate of 65 fps.
KeywordsAffine transform Optical quadrature microscopy Multiplane image stabilization Digital camera Parallel processing FPGA
The authors would like to thank Ministry of HRD, Govt. of India, for supporting this research work.
- 3.Bhandakar, S., Yu, H.: VLSI implementation of real-time image rotation. In: Proceedings of International Conference on Image Processing, vol. 2, pp. 1015–1018 (1996)Google Scholar
- 4.Biswal, PK., Banerjee, S.: An embedded solution of 2D fast affine transform for biomedical imaging systems. In: Proceddings of VLSI Design and Test Symposium (VDAT 2009), Bangalore, India, pp. 259–270 (2009)Google Scholar
- 6.Crookes, D., Boyle, K., Miller, P., Gillan, C.: GPU implementation of the affine transform for 3D image registration. 13th International Conference on Machine Vision and Image Processing (2009)Google Scholar
- 8.Eadie, D., Shevlin, F., Nisbet, A.: Correction of geometric image distortion using FPGAs. SPIE Conference on Optical Metrology, Imaging, and Machine Vision, Galway, IRL (2002)Google Scholar
- 11.Gonzalez, R.C., Woods, R.E.: Digital Image Processing, 3rd edn. Prentice Hall, Upper Saddle River (2008)Google Scholar
- 13.Jiang, XG., Zhou, JY., Shi, JH., Chen, HH.: FPGA implementation of image rotation using modified compensated CORDIC. In: 6th International Conference On ASIC (ASICON 2005), vol. 2, pp. 752–756 (2005)Google Scholar
- 15.Lee, S., Lee, G., Jang, ES., Kim, WY.: Fast affine transform for real-time machine vision applications. In: ICIC 2006, Springer, Berlin, Lecture Notes in Computer Science 4113, pp. 1180–1190 (2006)Google Scholar
- 17.Maharatna, K., Banerjee, S.: CORDIC based array architecture for affine transformation of images. In: International Conference on Communications, Computers and Devices (2000)Google Scholar
- 18.Mistry, P., Braganza, S., Kaeli, D., Leeser, M.: Accelerating phase unwrapping and affine transformations for optical quadrature microscopy using CUDA. In: Proceedings of 2nd Workshop on General Purpose Processing on Graphics Processing Units, ACM, New York, NY, USA, GPGPU-2, pp. 28–37 (2009)Google Scholar
- 19.Pailoor, R., Bartusek, J.: Implementation of affine warp using TI DSP. Application Report, Texas Instruments (2010)Google Scholar
- 22.Sony (2010) Development of an imaging system that creates a high-speed imaging world. http://www.sony.net/Products/SC-HP/cx_news/vol55/pdf/ featuring55, accessed on December, 2010