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Machine Allocation in Semiconductor Wafer Fabrication Systems: A Simulation-Based Approach

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The problem of maximizing the throughput of Semiconductor Wafer Fabrication Systems is addressed. We model the fabrication systems as a Stochastic Timed Automata and design a discrete-event simulation scheme. The simulation scheme is explicit, fast and achieves high fidelity which captures the feature of reentrant process flow and is flexible to accommodate diversified wafer lot scheduling policies. A series of Marginal Machine Allocation Algorithms are proposed to sequentially allocate machines. Numerical experiments suggest the designed methods are efficient to find good allocation solutions.

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This work is supported in partial by the National Natural Science Foundation of China (NSFC) under Grant No. U2268209. The authors thank the editor and three anonymous reviewers for their comments and suggestions which help to improve the article greatly.

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Correspondence to Yanfeng Wu.

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Yanfeng Wu is an assistant professor at the School of Finance, Jiangxi University of Finance and Economics. He received his Ph.D. from Fudan University. His research interests include discrete-event stochastic systems, stochastic optimization and statistical inference.

Sihua Chen is a professor at the School of Information Management, Jiangxi University of Finance and Economics. His research interests include human-computer intersection, hybrid intelligence, e-commerce, business intelligence, big data analysis and application.

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Wu, Y., Chen, S. Machine Allocation in Semiconductor Wafer Fabrication Systems: A Simulation-Based Approach. J. Syst. Sci. Syst. Eng. 32, 372–390 (2023).

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