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Solid-state non-volatile memories based on vdW heterostructure-based vertical-transport ferroelectric field-effect transistors

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Abstract

Driven by the explosive development of data-centric computation applications, it is becoming urgent to develop in-memory computing devices that are beyond the von Neumann architecture with an arrangement of separated logic and memory components. The transistor-type solid-state non-volatile memories, such as ferroelectric field-effect transistors (FeFETs), have long been regarded as a competitive candidate for future in-memory computing architectures. However, the density scaling towards high-density arrays would require advanced FeFETs with reduced footprints, which remains a great challenge so far. Here, a vertical-transport (VT) FeFET that flips the charge transport channel perpendicular to the substrate plane is proposed, in which a ferroelectric gate and a van der Waals (vdW) heterojunction channel are vertically integrated, effectively reducing the device footprints. The proposed VT-FeFET shows not only the robust binary non-volatile memory states but also several key synaptic functionalities at the device level. An artificial neural network with supervised learning was simulated based on the device conductance switching properties, showing excellent classification accuracy for the MNIST handwritten digits. These findings suggest that the proposed VT-FeFET could offer a new solution for future non-volatile memories as well as more advanced neuromorphic systems.

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Acknowledgements

This work was supported by National Key R&D Program of China (Grant No. 2023YFB4402303), National Natural Science Foundation of China (Grant Nos. 62090033, 62025402, 62274128, 92264202, 62293522, 92364204), Zhejiang Provincial Natural Science Foundation of China (Grant Nos. LDT23F04023F04, LDT23F04024F04, LR21F010003), Fundamental Research Funds for the Central Universities (Grant No. QTZX23079), and Key Research and Development Program of Ningbo City (Grant No. 2023Z071). Zheng-Dong LUO would like to thank Dr. C. Zhao with Analytic&Testing Center of NPU for the assistance of device fabrication.

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Authors and Affiliations

  1. Hangzhou Institute of Technology, Xidian University, Hangzhou, 311200, China

    Qiyu Yang, Zheng-Dong Luo, Fei Xiao, Yan Liu & Genquan Han

  2. State Key Discipline Laboratory of Wide Band Gap Semiconductor Technology, School of Microelectronics, Xidian University, Xi’an, 710071, China

    Qiyu Yang, Zheng-Dong Luo, Dongxin Tan, Yan Liu & Genquan Han

  3. School of Artificial Intelligence, Xidian University, Xi’an, 710071, China

    Junpeng Zhang

  4. School of Materials Science and Engineering, University of New South Wales (UNSW) Sydney, Sydney, NSW, 2052, Australia

    Dawei Zhang

  5. ARC Centre of Excellence in Future Low-Energy Electronics Technologies (FLEET), University of New South Wales (UNSW) Sydney, Sydney, NSW, 2052, Australia

    Dawei Zhang

  6. Key Laboratory of Light Field Manipulation and Information Acquisition, Ministry of Industry and Information Technology, and Shaanxi Key Laboratory of Optical Information Technology, School of Physical Science and Technology, Northwestern Polytechnical University, Xi’an, 710129, China

    Xuetao Gan

  7. Faculty of Electrical Engineering and Computer Science, Ningbo University, Ningbo, 315211, China

    Zhufei Chu & Yinshui Xia

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  1. Qiyu Yang
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  2. Zheng-Dong Luo
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  3. Fei Xiao
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  4. Junpeng Zhang
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  5. Dawei Zhang
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  6. Dongxin Tan
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  7. Xuetao Gan
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  8. Yan Liu
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  9. Zhufei Chu
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  10. Yinshui Xia
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  11. Genquan Han
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Corresponding authors

Correspondence to Zheng-Dong Luo or Xuetao Gan.

Additional information

Supporting information Supplementary Notes 1–7. The supporting information is available online at info.scichina.com and link.springer.com. The supporting materials are published as submitted, without typesetting or editing. The responsibility for scientific accuracy and content remains entirely with the authors.

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11432_2024_4004_MOESM1_ESM.pdf

Solid-state nonvolatile memories based on vdW heterostructure-based vertical-transport ferroelectric field-effect transistors

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Yang, Q., Luo, ZD., Xiao, F. et al. Solid-state non-volatile memories based on vdW heterostructure-based vertical-transport ferroelectric field-effect transistors. Sci. China Inf. Sci. 67, 160405 (2024). https://doi.org/10.1007/s11432-024-4004-9

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  • DOI: https://doi.org/10.1007/s11432-024-4004-9

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