Abstract
This paper proposes a low-floor bit-mapping (LFBM) scheme for bit-interleaved coded modulation (BICM) systems to meet more stringent quality of service requirements of 5G and beyond. For high-efficiency transmissions, we consider the 5G low-density parity-check codes with high-order 2m-quadrature amplitude modulations (QAMs). The proposed LFBM scheme overcomes plenty of trapping sets induced by the bit interleaver, which focuses on the waterfall performance too aggressively. When the high-order QAM is used, the row-column interleaver specified by the 5G standard is such a bit interleaver. The LFBM scheme only optimizes the rule of mapping an m-bit tuple output by the row-column interleaver to a modulation symbol, rather than the entire bit interleaver. Therefore, the optimized bit mapper is actually an m-bit permutation module concatenated with the original bit interleaver employed in the current 5G BICM systems. The simulation results confirm that the LFBM scheme can lower the error floor of the 5G BICM system by approximately two orders of magnitude, while with negligible performance loss in the waterfall region.
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This work was supported by National Key Research and Development Program of China (Grant No. 2018YFB1801103), Jiangsu Province Basic Research Project (Grant No. BK20192002), and Southeast University China Mobile Research Institute Joint Innovation Center.
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Zhu, M., Jiang, M., Zhao, C. et al. A low-floor bit-mapping scheme for LDPC coded BICM for 5G and beyond systems. Sci. China Inf. Sci. 66, 202301 (2023). https://doi.org/10.1007/s11432-022-3670-5
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DOI: https://doi.org/10.1007/s11432-022-3670-5