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All-van der Waals stacking ferroelectric field-effect transistor based on In2Se3 for high-density memory

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Abstract

High-density integration of ferroelectric field-effect transistors (FeFETs) is hindered by factors such as interfacial states, short-channel effects, and ferroelectricity degradation in ultrathin films. Accordingly, the introduction of two-dimensional (2D) materials could effectively solve these problems. However, most current studies focus on the replacement of Si-based channels with 2D channels. Little progress has been made in addressing issues caused by bulk-phase ferroelectric gate layers, such as the unavoidable rough interfaces and the fading of ferroelectricity in ultrathin films. Herein, the 2D ferroelectric material In2Se3 is introduced as the gate dielectric. Combined with 2D insulating h-BN and 2D channel MoS2, an all-van der Waals (vdW) stacking FeFET is fabricated to provide a straight solution for the abovementioned issues. First, the robust ferroelectric phase of In2 Se3 is verified in an ultrathin film case and a high-temperature case, which is outstanding among recently reported 2D ferroelectrics. Second, device-level out-of-plane ferroelectric polarization switching is achieved in the cross-structure device. Based on these results, In2 Se3 is adopted as the ferroelectric gate dielectric to fabricate all-vdW stacking FeFETs. The subsequent transistor performance measurement on the fabricated FeFETs indicates that the ferroelectric polarization of the In2 Se3 layer plays a dominating role in forming a counterclockwise hysteresis loop. Further pulse response measurements manifest the feasibility of nonvolatile channel conductance tuning of these devices with a proper pulse design. Our findings suggest that In2Se3 is a suitable 2D ferroelectric gate material and that all-vdW stacking FeFETs based on 2D ferroelectrics are promising in the application of high-density memory.

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Acknowledgements

This work was supported by National Natural Science Foundation of China (Grant Nos. 62174065, 61774068), Key Research and Development Plan of Hubei Province (Grant No. 2020BAB007), and Hubei Provincial Natural Science Foundation of China (Grant No. 2021CFA038). The authors acknowledge the support from Hubei Key Laboratory of Advanced Memories & Hubei Engineering Research Center on Microelectronics.

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  1. Xiaojie WANG and Zeyang FENG have the same contribution to this work.

Authors and Affiliations

  1. Wuhan National Laboratory for Optoelectronics, School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan, 430074, China

    Xiaojie Wang, Zeyang Feng, Jingwei Cai, Hao Tong & Xiangshui Miao

  2. Hubei Yangtze Memory Laboratories, Wuhan, 430205, China

    Hao Tong & Xiangshui Miao

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  1. Xiaojie Wang
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  2. Zeyang Feng
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  3. Jingwei Cai
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  4. Hao Tong
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  5. Xiangshui Miao
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Correspondence to Hao Tong.

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Wang, X., Feng, Z., Cai, J. et al. All-van der Waals stacking ferroelectric field-effect transistor based on In2Se3 for high-density memory. Sci. China Inf. Sci. 66, 182401 (2023). https://doi.org/10.1007/s11432-022-3617-2

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  • DOI: https://doi.org/10.1007/s11432-022-3617-2

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