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Modeling of program Vth distribution for 3-D TLC NAND flash memory

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Abstract

This paper proposes a simulation method to model the program Vth distribution of 3-D vertical channel TLC/QLC charge-trapping NAND flash memory. The program Vth distribution can be calculated by considering ISPP noise, WL-WL interference, and the RTN effect of tunneling oxide and poly Si, which are the major physical factors affecting the width of program Vth distribution. Then, the program Vth distribution shapes with different ISPP incremental voltage steps are compared, and the results are found to be consistent with the experimental results. Code and layer-dependent coupling coefficients of WL-WL interference in 3-D vertical channel NAND flash memory are considered. The effect of RTN on the program Vth distribution is comprehensively studied. The program Vth distribution of a WL is calibrated with the measurement, and a good agreement is obtained, validating the array program Vth distribution simulation method. The simulation method can help in improving the reliability of 3-D TLC NAND flash memory and provides guidance for the design and optimization of 3-D QLC NAND flash memory technology.

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Acknowledgements

This work was supported by National Key Research and Development Plan (Grant No. 2016YFA02-02101); Huawei Technologies Co., Ltd., Hangzhou, China; National Natural Science Foundation of China (Grant No. 61421005); and National High-Tech R&D Program (863 Program) (Grant No. 2015AA016501).

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Correspondence to Gang Du.

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Wang, K., Du, G., Lun, Z. et al. Modeling of program Vth distribution for 3-D TLC NAND flash memory. Sci. China Inf. Sci. 62, 42401 (2019). https://doi.org/10.1007/s11432-018-9490-1

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Keywords

  • modeling and simulation
  • measurement
  • reliability
  • program Vth distribution
  • charge-trapping memory
  • 3-D vertical channel TLC/QLC NAND flash memory