Springer Nature is making SARS-CoV-2 and COVID-19 research free. View research | View latest news | Sign up for updates

Neuromorphic computing with memristive devices

Abstract

Technology advances in the last a few decades have resulted in profound changes in our society, from workplaces to living rooms to how we socialize with each other. These changes in turn drive further technology developments, as the exponential growth of data demands ever increasing computing power. However, improvements in computing capacity from device scaling alone is no longer sufficient, and new materials, devices, and architectures likely need to be developed collaboratively to meet present and future computing needs. Specifically, devices that offer co-located memory and computing characteristics, as represented by memristor devices and memristor-based computing systems, have attracted broad interest in the last decade. Besides tremendous appeal in data storage applications, memristors offer the potential for efficient hardware realization of neuromorphic computing architectures that can effectively address the memory and energy walls faced by conventional von Neumann computing architectures. In this review, we evaluate the state-of-the-art in memristor devices and systems, and highlight the potential and challenges of applying such devices and architectures in neuromorphic computing applications. New directions that can lead to general, efficient in-memory computing systems will also be discussed.

This is a preview of subscription content, log in to check access.

References

  1. 1

    Yang J J, Strukov D B, Stewart D R. Memristive devices for computing. Nat Nanotech, 2013, 8: 13–24

  2. 2

    Kim K H, Gaba S, Wheeler D, et al. A functional hybrid memristor crossbar-array/CMOS system for data storage and neuromorphic applications. Nano Lett, 2012, 12: 389–395

  3. 3

    Pershin Y V, Di Ventra M. Neuromorphic, digital, and quantum computation with memory circuit elements. Proc IEEE, 2012, 100: 2071–2080

  4. 4

    Gaba S, Knag P, Zhang Z Y, et al. Memristive devices for stochastic computing. In: Proceedings of IEEE International Symposium on Circuits and Systems, Melbourne, 2014. 2592–2595

  5. 5

    Zidan M, Jeong Y J, Shin J H, et al. Field-programmable crossbar array (FPCA) for reconfigurable computing. IEEE Trans Multi-Scale Comput Syst, 2017. doi: 10.1109/TMSCS.2017.2721160

  6. 6

    Borghetti J, Snider G S, Kuekes P J, et al. ‘Memristive’ switches enable ‘stateful’ logic operations via material implication. Nature, 2010, 464: 873–876

  7. 7

    Mead C. Neuromorphic electronic systems. Proc IEEE, 1990, 78: 1629–1636

  8. 8

    Indiveri G, Horiuchi T K. Frontiers in neuromorphic engineering. Front Neurosci, 2011, 5: 118

  9. 9

    Chicca E, Stefanini F, Bartolozzi C, et al. Neuromorphic electronic circuits for building autonomous cognitive systems. Proc IEEE, 2014, 102: 1367–1388

  10. 10

    Gaba S, Sheridan P, Zhou J, et al. Stochastic memristive devices for computing and neuromorphic applications. Nanoscale, 2013, 5: 5872–5878

  11. 11

    Prezioso M, Merrikh-Bayat F, Hoskins B D, et al. Training and operation of an integrated neuromorphic network based on metal-oxide memristors. Nature, 2015, 521: 61–64

  12. 12

    Indiveri G, Linares-Barranco B, Legenstein R, et al. Integration of nanoscale memristor synapses in neuromorphic computing architectures. Nanotechnology, 2013, 24: 384010

  13. 13

    Zidan M A, Chen A, Indiveri G, et al. Memristive computing devices and applications. J Electroceram, 2017, 39: 4–20

  14. 14

    Chua L O, Kang S M. Memristive devices and systems. Proc IEEE, 1976, 64: 209–223

  15. 15

    Strukov D B, Snider G S, Stewart D R, et al. The missing memristor found. Nature, 2008, 453: 80–83

  16. 16

    Govoreanu B, Kar G S, Chen Y Y, et al. 10×10 nm2 Hf/HfOx crossbar resistive RAM with excellent performance, reliability and low-energy operation. In: Proceedings of IEEE International Electron Devices Meeting, Washington, 2011

  17. 17

    Torrezan A C, Strachan J P, Medeiros-Ribeiro G, et al. Sub-nanosecond switching of a tantalum oxide memristor. Nanotechnology, 2011, 22: 485203

  18. 18

    Lee M J, Lee C B, Lee D, et al. A fast, high-endurance and scalable non-volatile memory device made from asymmetric Ta2O5−x/TaO2−x bilayer structures. Nat Mater, 2011, 10: 625–630

  19. 19

    Valov I, Lu W D. Nanoscale electrochemistry using dielectric thin films as solid electrolytes. Nanoscale, 2016, 8: 13828–13837

  20. 20

    Younis A, Chu D, Lin X, et al. High-performance nanocomposite based memristor with controlled quantum dots as charge traps. ACS Appl Mater Interface, 2013, 5: 2249–2254

  21. 21

    Stoliar P, Rozenberg M, Janod E, et al. Nonthermal and purely electronic resistive switching in a Mott memory. Phys Rev B, 2014, 90: 45146

  22. 22

    Wong H S P, Raoux S, Kim S B, et al. Phase change memory. Proc IEEE, 2010, 98: 2201–2227

  23. 23

    Diao Z T, Li Z J, Wang S Y, et al. Spin-transfer torque switching in magnetic tunnel junctions and spin-transfer torque random access memory. J Phys-Condens Matter, 2007, 19: 165209

  24. 24

    Sheridan P M, Cai F X, Du C, et al. Sparse coding with memristor networks. Nat Nanotech, 2017, 12: 784–789

  25. 25

    Chang T, Jo S H, Kim K H, et al. Synaptic behaviors and modeling of a metal oxide memristive device. Appl Phys A, 2011, 102: 857–863

  26. 26

    Hasegawa T, Ohno T, Terabe K, et al. Learning abilities achieved by a single solid-state atomic switch. Adv Mater, 2010, 22: 1831–1834

  27. 27

    Jo S H, Chang T, Ebong I, et al. Nanoscale memristor device as synapse in neuromorphic systems. Nano Lett, 2010, 10: 1297–1301

  28. 28

    Kim S, Choi S H, Lu W. Comprehensive physical model of dynamic resistive switching in an oxide memristor. ACS Nano, 2014, 8: 2369–2376

  29. 29

    Seo K, Kim I, Jung S, et al. Analog memory and spike-timing-dependent plasticity characteristics of a nanoscale titanium oxide bilayer resistive switching device. Nanotechnology, 2011, 22: 254023

  30. 30

    Kim S, Du C, Sheridan P, et al. Experimental demonstration of a second-order memristor and its ability to biorealistically implement synaptic plasticity. Nano Lett, 2015, 15: 2203–2211

  31. 31

    Du C, Ma W, Chang T, et al. Biorealistic implementation of synaptic functions with oxide memristors through internal ionic dynamics. Adv Funct Mater, 2015, 25: 4290–4299

  32. 32

    Kuzum D, Yu S, Wong H S. Synaptic electronics: materials, devices and applications. Nanotechnology, 2013, 24: 382001

  33. 33

    Wang Z R, Joshi S, Savelev S E, et al. Memristors with diffusive dynamics as synaptic emulators for neuromorphic computing. Nat Mater, 2017, 16: 101–108

  34. 34

    Zidan M A, Jeong Y J, Lu W D. Temporal learning using second-order memristors. IEEE Trans Nanotechnol, 2017, 16: 721–723

  35. 35

    Ma W, Chen L, Du C, et al. Temporal information encoding in dynamic memristive devices. Appl Phys Lett, 2015, 107: 193101

  36. 36

    Zhu X, Du C, Jeong Y J, et al. Emulation of synaptic metaplasticity in memristors. Nanoscale, 2017, 9: 45–51

  37. 37

    Yang Y, Chen B, Lu W D. Memristive physically evolving networks enabling the emulation of heterosynaptic plasticity. Adv Mater, 2015, 27: 7720–7727

  38. 38

    Merolla P A, Arthur J V, Alvarez-Icaza R, et al. A million spiking-neuron integrated circuit with a scalable communication network and interface. Science, 2014, 345: 668–673

  39. 39

    Benjamin B V, Gao P, McQuinn E, et al. Neurogrid: a mixed-analog-digital multichip system for large-scale neural simulations. Proc IEEE, 2014, 102: 699–716

  40. 40

    Furber S B, Galluppi F, Temple S, et al. The SpiNNaker project. Proc IEEE, 2014, 102: 652–665

  41. 41

    Schemmel J, Briiderle D, Griibl A, et al. A wafer-scale neuromorphic hardware system for large-scale neural modeling. In: Proceedings of IEEE International Symposium on Circuits and Systems, Paris, 2010. 1947–1950

  42. 42

    Pfeil T, Grübl A, Jeltsch S, et al. Six networks on a universal neuromorphic computing substrate. Front Neurosci, 2013, 7: 11

  43. 43

    Indiveri G, Liu S C. Memory and information processing in neuromorphic systems. Proc IEEE, 2015, 103: 1379–1397

  44. 44

    Alibart F, Zamanidoost E, Strukov D B. Pattern classification by memristive crossbar circuits using ex situ and in situ training. Nat Commun, 2013, 4: 2072

  45. 45

    Sheridan P M, Du C, Lu W D. Feature extraction using memristor networks. IEEE Trans Neural Netw Learning Syst, 2016, 27: 2327–2336

  46. 46

    Choi S, Sheridan P, Lu W D. Data clustering using memristor networks. Sci Rep, 2015, 5: 10492

  47. 47

    Sheridan P, Ma W, Lu W. Pattern recognition with memristor networks. In: Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS), Melbourne, 2014. 1078–1081

  48. 48

    Adhikari S P, Yang C J, Kim H, et al. Memristor bridge synapse-based neural network and its learning. IEEE Trans Neural Netw Learning Syst, 2012, 23: 1426–1435

  49. 49

    Hu M, Strachan J P, Grafals E M, et al. Dot-product engine for neuromorphic computing. In: Proceedings of the 53rd Annual Design Automation Conference, Austin, 2016

  50. 50

    Choi S, Shin J H, Lee J, et al. Experimental demonstration of feature extraction and dimensionality reduction using memristor networks. Nano Lett, 2017, 17: 3113–3118

  51. 51

    Yu S, Chen P Y, Cao Y, et al. Scaling-up resistive synaptic arrays for neuro-inspired architecture: challenges and prospect. In: Proceedings of International Electron Devices Meeting, Washington, 2015

  52. 52

    Sheridan P, Lu W D. Defect consideratons for robust sparse coding using memristor arrays. In: Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures, Boston, 2015, 137–138

  53. 53

    Ma W, Cai F, Du C, et al. Device nonideality effects on image reconstruction using memristor arrays. In: Proceedings of 2016 IEEE International Electron Devices Meeting (IEDM), San Francisco, 2016

  54. 54

    Kumar S, Strachan J P, Williams R S. Chaotic dynamics in nanoscale NbO2 Mott memristors for analogue computing. Nature, 2017, 548: 318–321

  55. 55

    Tuma T, Pantazi A, Le Gallo M, et al. Stochastic phase-change neurons. Nat Nanotech, 2016, 11: 693–699

  56. 56

    Chen B, Cai F X, Zhou J T, et al. Efficient in-memory computing architecture based on crossbar arrays. In: Proceedings of International Electron Devices Meeting, Washington, 2015

Download references

Acknowledgements

This work was supported in part by National Science Foundation (NSF) (Grant Nos. ECCS-1708700, CCF-1617315). We would like to thank F CAI, J LEE and J SHIN for helpful discussions.

Author information

Correspondence to Wei D. Lu.

Rights and permissions

Reprints and Permissions

About this article

Verify currency and authenticity via CrossMark

Cite this article

Ma, W., Zidan, M.A. & Lu, W.D. Neuromorphic computing with memristive devices. Sci. China Inf. Sci. 61, 060422 (2018). https://doi.org/10.1007/s11432-017-9424-y

Download citation

Keywords

  • memristor
  • resistive random-access-memory (RRAM)
  • neuromorphic computing
  • non-von Neumann
  • process in-memory