Modeling the impact of process and operation variations on the soft error rate of digital circuits

This is a preview of subscription content, access via your institution.


  1. 1

    Loveless T D, Alles M L, Ball D R, et al. Parametric variability affecting 45 nm SOI SRAM single event upset cross-section. IEEE Trans Nucl Sci, 2010, 57: 3228–3233

    Article  Google Scholar 

  2. 2

    Kauppila A V, Bhuva B L, Kauppila J S, et al. Impact of process variations on SRAM single event upsets. IEEE Trans Nucl Sci, 2011, 58: 834–839

    Article  Google Scholar 

  3. 3

    Peng H K, Wen C, Bhadra J. On soft error rate analysis of scaled CMOS designs: a statistical perspective. In: Proceedings of IEEE/ACM International Conference on Computer-Aided Design, San Jose, 2009. 157–163

    Google Scholar 

  4. 4

    Gasiot G, Castelnovo A, Glorieux M, et al, Process variability effect on soft error rate by characterization of large number of samples. IEEE Trans Nucl Sci, 2012, 59: 2914–2919

    Article  Google Scholar 

  5. 5

    Mostafa H, Anis M, Elmasry M, et al. A designoriented soft error rate variation model accounting for both die-to-die and within-die variations in submicrometer CMOS SRAM cells. IEEE Trans Cric Syst, 2010, 57: 1298–1311

    MathSciNet  Article  Google Scholar 

  6. 6

    Kauppila A V, Bhuva B L, Massengill L W, et al. Impact of process variations and charge sharing on the single event upset response of flip-flops. IEEE Trans Nucl Sci, 2011, 58: 2658–2663

    Article  Google Scholar 

  7. 7

    Liang B, Song R Q. Analyzing and mitigating the internal single-event transient in radiation hardened flipflops at circuit-level. Sci China Tech Sci, 2014, 57: 1–6

    Google Scholar 

  8. 8

    Song R Q, Chen S M, He Y B, et al. Flip-flops soft error rate evaluation approach considering internal single-event transient. Sci China Inf Sci, 2015, 58: 062403

    Article  Google Scholar 

  9. 9

    Artola L, Hubert G, Warren K M, et al. SEU prediction from SET model using multi-node collection in Bulk transistors and SRAMs down to the 65 nm technology node. IEEE Trans Nucl Sci, 2011, 58: 1338–1346

    Article  Google Scholar 

  10. 10

    Song R Q, Chen S M, Huang P C, et al. PABAM: a physics-based analytical model to estimate bipolar amplification effect induced collected charge at circuit level. IEEE Trans Device Mater Rel, 2015, 15: 595–603

    Article  Google Scholar 

Download references


This work was supported by National Natural Science Foundation of China (Grant Nos. 61376109, 61434007). The authors would like to thank the HI-13 team and the HIRFL team for heavy ion experiment support.

Author information



Corresponding author

Correspondence to Shuming Chen.

Electronic supplementary material

Rights and permissions

Reprints and Permissions

About this article

Verify currency and authenticity via CrossMark

Cite this article

Song, R., Chen, S., Liang, B. et al. Modeling the impact of process and operation variations on the soft error rate of digital circuits. Sci. China Inf. Sci. 60, 129402 (2017).

Download citation