Design for manufacturability and reliability in extreme-scaling VLSI

Abstract

In the last five decades, the number of transistors on a chip has increased exponentially in accordance with the Moore’s law, and the semiconductor industry has followed this law as long-term planning and targeting for research and development. However, as the transistor feature size is further shrunk to sub-14nm nanometer regime, modern integrated circuit (IC) designs are challenged by exacerbated manufacturability and reliability issues. To overcome these grand challenges, full-chip modeling and physical design tools are imperative to achieve high manufacturability and reliability. In this paper, we will discuss some key process technology and VLSI design co-optimization issues in nanometer VLSI.

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Yu, B., Xu, X., Roy, S. et al. Design for manufacturability and reliability in extreme-scaling VLSI. Sci. China Inf. Sci. 59, 061406 (2016). https://doi.org/10.1007/s11432-016-5560-6

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Keywords

  • design for manufacturability
  • design for reliability
  • VLSI CAD