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A two-dimensional simulation method for investigating charge transport behavior in 3-D charge trapping memory

用于研究三维电荷俘获存储器电子输运的二维模拟方法

Abstract

This work presents a self-consistent two-dimensional (2-D) simulation method with unified physical models for different operation regimes of charge trapping memory. The simulation carefully takes into consideration the tunneling process, charge trapping/de-trapping mechanisms, and 2-D drift-diffusion transport within the storage layer. A string of three memory cells has been simulated and evaluated for different gate stack compositions and temperatures. The simulator is able to describe the charge transport behavior along bitline and tunneling directions under different operations. Good agreement has been made with experimental data, which hence validates the implemented physical models and altogether confirms the simulation as a valuable tool for evaluating the characteristics of three-dimensional NAND flash memory.

创新点

本文介绍了可用于研究三维电荷俘获存储器的二维自洽模拟方法。该方法使用了统一的物理模型, 可对电荷存储器的各个工作模拟进行模拟。该模拟方法考虑了载流子的隧穿过程、电荷俘获发射机制, 以及在电荷存储层中的二维漂移-扩散模型, 并且同时对一条位线上相邻的三个存储单元进行模拟。本文开发的模拟器同时考虑了沿位线和隧穿两个方向的电子输运, 可用来研究不同栅叠层存储器件在多种温度下的电子输运行为。

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Correspondence to Gang Du.

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Lun, Z., Du, G., Zhao, K. et al. A two-dimensional simulation method for investigating charge transport behavior in 3-D charge trapping memory. Sci. China Inf. Sci. 59, 122403 (2016). https://doi.org/10.1007/s11432-015-5475-7

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Keywords

  • charge trapping memory
  • semiconductor device modeling
  • 2-D charge transport
  • 3-D NAND flash
  • device modeling and simulation

关键词

  • 电荷俘获存储器
  • 半导体器件模拟
  • 二维电荷输运
  • 三维NAND存储器
  • 器件模型与模拟