Value locality based storage compression memory architecture for ECG sensor node

Science China Information Sciences volume 59, Article number: 042401 (2016) Cite this article

Abstract

This paper proposes a value compression memory architecture for QRS detection in ultra-low-power ECG sensor nodes. Based on the exploration of value spatial locality in the most critical preprocessing stage of the ECG algorithm, a cost efficient compression strategy, which reorganizes several adjacent sample values into a base value with several displacements, is proposed. The displacements will be half or quarter scale quantifications; as a result, the storage size is reduced. The memory architecture saves memory space by storing compressed data with value spatial locality into a compressed memory section and by using a small, uncompressed memory section as backup to store the uncompressed data when a value spatial locality miss occurs. Furthermore, a low-power accession strategy is proposed to achieve low-power accession. An embodiment of the proposed memory architecture has been evaluated using the MIT/BIH database, the proposed memory architecture and a low-power accession strategy to achieve memory space savings of 32.5% and to achieve a 68.1% power reduction with a negligible performance reduction of 0.2%.

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Affiliations

  1. Institute of VLSI Design, Zhejiang University, Hangzhou, 310027, China

    Chaojun Zhao & Zhijian Chen

  2. State Key Laboratory of ASIC & System, Fudan University, Shanghai, 201203, China

    Chen Chen & Jianyi Meng

Authors
  1. Chaojun Zhao
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  2. Chen Chen
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  3. Zhijian Chen
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  4. Jianyi Meng
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Correspondence to Zhijian Chen.

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Zhao, C., Chen, C., Chen, Z. et al. Value locality based storage compression memory architecture for ECG sensor node. Sci. China Inf. Sci. 59, 042401 (2016). https://doi.org/10.1007/s11432-015-5371-1

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Keywords

  • ECG R peak detection
  • wavelet transform
  • memory compression
  • low power
  • memory architecture