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A preliminary experimental validation of superposition strategy in thermal management of integrated circuit with multiple hot-spots

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Abstract

Thermal management is a key issue in the integrated circuit (IC) design. In this paper, the superposition strategy was experimentally validated using a modeling IC device, which was fabricated by laboratory-level microfabrication technique. Metal thin film resistors on the top of dielectric layer were used to analogize the multiple hot-spots in the modeling IC device. The measured temperature rise with multiple hot-spots agrees well with the predictions given by the superposition calculations. With the help of the superposition strategy, thermal management of IC device can be significantly simplified by decomposing the system into sub-systems and optimizing each part individually. The influence coefficients in the superposition strategy extracted from the experimental measurement offer the IC designers a useful engineering tool to facility the thermal optimization and evaluate the thermal performance of IC devices.

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References

  1. Packan P A. Pushing the limits. Science, 1999, 285: 2079–2081

    Article  Google Scholar 

  2. Lau J H. Evolution and outlook of TSV and 3D IC/Si integration. In: 12th Electronics Packaging Technology Conference (EPTC), Singapore, 2010. 560–570

    Google Scholar 

  3. Al-Sarawi S F, Abbott D, Franzon P D. A review of 3-D packaging technology. IEEE Trans Comp Pack Manuf Tech B: Adv Pack, 1998, 21: 2–14

    Article  Google Scholar 

  4. Farooq M G, Iyer S S. 3D integration review. Sci China Inf Sci, 2011, 54: 1012–1025

    Article  Google Scholar 

  5. Sapatnekar S S. Addressing thermal and power delivery bottlenecks in 3D circuits. In: Design Automation Conference, ASP-DAC 2009, Asia and South Pacific, Yokohama, 2009. 423–428

    Chapter  Google Scholar 

  6. Agonafer D, Kaisare A, Hossain M M, et al. Thermo-mechanical challenges in stacked packaging. Heat Transfer Eng, 2008, 29: 134–148

    Article  Google Scholar 

  7. Chen C L, Chen C K, Bums J A, et al. Thermal effects of three dimensional integrated circuit stacks. In: IEEE International SOI Conference Proceedings, Indian Wells, CA, 2007. 91–92

    Google Scholar 

  8. Plas G V D, Limaye P, Loi I, et al. Design issues and considerations for low-cost 3-D TSV IC technology. IEEE J Solid-State Circuits, 2011, 46: 293–307

    Article  Google Scholar 

  9. Tsai C H, Kang S M. Cell-level placement for improving substrate thermal distribution. IEEE Trans Comput Aided Design Integrat Circuits Syst, 2000, 19: 253–2660

    Article  Google Scholar 

  10. Goplen B, Sapatnekar S S. Efficient thermal placement of standard cells in 3D ICs using a force directed approach. In: Proceedings of the 2003 IEEE/ACM International conference on Computer-aided design (ICCAD’03), San Jose, CA, USA, 2003. 86–89

    Google Scholar 

  11. Zhan Y, Sapatnekar S S. A high efficiency full-chip thermal simulation algorithm. In: Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design (ICCAD’05), San Jose, CA, USA, 2005. 635–638

    Google Scholar 

  12. Oh D, Chen C C P, Hu Y H. 3DFFT: Thermal analysis of nonhomogeneous IC using 3D FFT green function method. In: 8th International Symposium on Quality Electronic Design (ISQED’07), San Jose, CA, USA, 2007. 567–572

    Google Scholar 

  13. Cheng Y K, Chin-Chi T, Dharchoudhury A, et al. A chip-level electrothermal simulator for temperature profile estimation of CMOS VLSI chips. In: IEEE International Symposium on Circuits and Systems, Connecting the World (ISCAS’96), Atlanta, GA, 1996. 580–583

    Google Scholar 

  14. Wilkerson P, Raman A, Turowski M. Automated thermal simulation of three-dimensional integrated circuits. In: IEEE the 9th Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITHERM’04), Las Vegas, NV, USA, 2004. 706–713

    Google Scholar 

  15. Nayfach-Battilana J, Renau J. SOI, interconnect, package, and mainboard thermal characterization. In: Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design (ISLPED’09), San Francisco, California, USA, 2009. 327–330

    Chapter  Google Scholar 

  16. Skadron K, Stan M R, Wei H, et al. Temperature-aware computer systems: Opportunities and challenges. IEEE Micro, 2003, 23: 52–61

    Article  Google Scholar 

  17. Huang W, Sankaranarayanan K, Skadron K, et al. Accurate, pre-RTL temperature-aware design using a parameterized, geometric thermal model. IEEE Trans Comput, 2008, 57: 1277–1288

    Article  MathSciNet  Google Scholar 

  18. Black B, Annavaram M, Brekelbaum N, et al. Die stacking (3D) microarchitecture. In: 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO’06), Orlando, Florida, USA, 2006. 469–479

    Google Scholar 

  19. Kim J, Jhang S T, Jhon C S. Dynamic register-renaming scheme for reducing power-density and temperature. In: Proceedings of the 2010 ACM Symposium on Applied Computing (SAC’10), Sierre, Switzerland, 2010. 231–237

    Chapter  Google Scholar 

  20. Clarke H, Murakami K. Superposition principle applied to thermal analysis for 3DICs. In: International Conference on Circuits, System and Simulation (ICCSS 2011), Bangkok, Thailand, 2011. 159–164

    Google Scholar 

  21. Wang J C. Superposition method to investigate the thermal performance of heat sink with embedded heat pipes. Int Commun Heat Mass Transfer, 2009, 36: 686–692

    Article  Google Scholar 

  22. Luo X B, Mao Z M. Thermal modeling and design for microchannel cold plate with high temperature uniformity subjected to multiple heat sources. Int Commun Heat Mass Transfer, 2012, 39: 781–785

    Article  Google Scholar 

  23. Yovanovich M M, Muzychka Y S, Culham J R. Spreading resistance of isoflux rectangles and strips on compound flux channels. J Thermophys Heat Transfer, 1999, 13: 495–500

    Article  Google Scholar 

  24. Muzychka Y S, Culham J R, Yovanovich M M. Thermal spreading resistance of eccentric heat sources on rectangular flux channels. J Electr Pack, 2003, 125: 178–185

    Article  Google Scholar 

  25. Muzychka Y S. Influence coefficient method for calculating discrete heat source temperature on finite convectively cooled substrates. IEEE Trans Comp Pack Tech, 2006, 29: 636–643

    Article  Google Scholar 

  26. Muzychka Y S, Bagnall K R, Wang E N. Thermal spreading resistance and heat source temperature in compound orthotropic systems with interfacial resistance. IEEE Trans Comp Pack Manuf Techn, 2013, 3: 1826–1841

    Article  Google Scholar 

  27. Byon C, Choo K, Kim S J. Experimental and analytical study on chip hot spot temperature. Int J Heat Mass Transfer, 2011, 54: 2066–2072

    Article  MATH  Google Scholar 

  28. Lau J H, Yue T G. Thermal management of 3D IC integration with TSV (through silicon via). In: IEEE 59th Electronic Components And Technology Conference (ECTC 2009), San Diego, CA, USA, 2009. 635–640

    Chapter  Google Scholar 

  29. Wang R X, Huang X J, Liu G F, et al. Fabrication and characterization of a parylene-based three-dimensional microelectrode array for use in retinal prosthesis. IEEE J Microelectromech Syst, 2010, 19: 367–374

    Article  MathSciNet  Google Scholar 

  30. Liu Y P, Wang W, Yang C, et al. Aluminum-photoresist dual-layer lift-off process for gold micropattern preparation in cellular researches. In: IEEE 5th International Conference on Nano/Micro Engineered and Molecular Systems (NEMS 2010), Xiamen, China, 2010. 297–300

    Google Scholar 

  31. Lei Y H, Wang W, Yu H Q, et al. A parylene-filled-trench technique for thermal isolation in silicon-based microdevices. J Micromech Microeng, 2009, 19: 0350133

    Article  Google Scholar 

  32. Kandlikar S G. High flux heat removal with microchannels-A roadmap of challenges and opportunities. Heat Transfer Eng, 2005, 26: 5–14

    Article  Google Scholar 

  33. Colgan E G, Furman B, Gaynes M, et al. A practical implementation of silicon microchannel coolers for high power chips. IEEE Trans Comp Pack Tech, 2007, 30: 218–225

    Article  Google Scholar 

  34. Luo X B, Sheng L, Jiang X P, et al. Experimental and numerical study on a micro jet cooling solution for high power LEDs. Sci China Ser E-Tech Sci, 2007, 50: 478–489

    Article  Google Scholar 

  35. Dang B, Bakir M S, Sekar D C, et al. Integrated microfluidic cooling and interconnects for 2D and 3D chips. IEEE Trans Adv Pack, 2010, 33: 79–87

    Article  Google Scholar 

  36. Lee M, Wong Y Y, Wong M, et al. Size and shape effects on two-phase flow patterns in microchannel forced convection boiling. J Micromech Microeng, 2003, 13: 155–164

    Article  Google Scholar 

  37. Lee M, Cheung L S L, Lee Y K, et al. Height effect on nucleationsite activity and size-dependent bubble dynamics in microchannel convective boiling. J Micromech Microeng, 2005, 15: 2121–2129

    Article  MathSciNet  Google Scholar 

  38. Muzychka Y S. Constructal design of forced convection cooled microchannel heat sinks and heat exchangers. Int J Heat Mass Transfer, 2005, 48: 3119–3127

    Article  MATH  Google Scholar 

  39. Lu X B, Hua Z Z, Liu M J, et al. Analysis of heat transfer of loop heat pipe used to cool high power LED. Sci China Ser E-Tech Sci, 2009, 52: 3527–3532

    Article  Google Scholar 

  40. Hong F J, Cheng P, Wu H Y. Characterization on the performance of a fractal-shaped microchannel network for microelectronic cooling. J Micromech Microeng, 2011, 21: 065018

    Article  Google Scholar 

  41. Hassan I, Phutthavong P, Abdelgawad M. Microchannel heat sinks: An overview of the state-of-the-art. Microscale Thermophys Eng, 2004, 8: 183–205

    Article  Google Scholar 

  42. Li Z G, Huai X L, Tao Y J, et al. Effects of thermal property variations on the liquid flow and heat transfer in microchannel heat sinks. Appl Therm Eng, 2007, 27: 2803–2814

    Article  Google Scholar 

  43. Robinson A J. A thermal-hydraulic comparison of liquid microchannel and impinging liquid jet array heat sinks for high-power electronics cooling. IEEE Trans Comp Pack Tech, 2009, 32: 347–357

    Article  Google Scholar 

  44. Wu X Y, Wu H Y, Cheng P. Pressure drop and heat transfer of Al2O3-H2O nanofluids through silicon microchannels. J Micromech Microeng, 2009, 19: 105020

    Article  Google Scholar 

  45. Lin Z R, Wang S F, Zhang W B. Experimental study on microcapsule fluid oscillating heat pipe. Sci China Ser E-Tech Sci, 2009, 52: 1601–1606

    Article  Google Scholar 

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Correspondence to Wei Wang.

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Liu, K., Pi, Y., Wang, W. et al. A preliminary experimental validation of superposition strategy in thermal management of integrated circuit with multiple hot-spots. Sci. China Technol. Sci. 57, 2138–2143 (2014). https://doi.org/10.1007/s11431-014-5645-7

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  • DOI: https://doi.org/10.1007/s11431-014-5645-7

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