Abstract
Major manufacturers in the automotive industry are now adopting automotive Ethernet as the In-Vehicle Network standard. The increased bandwidth and lower cost have been the motivating factors to use automotive Ethernet as the backbone for interconnecting various components within the vehicle. The components that control the critical functions in the vehicle should have a synchronized time base. IEEE 802.1 AS-Rev, the specification for timing and synchronization employs generalized Precision Time Protocol (gPTP) for clock synchronization in automotive Ethernet. In a network of time-aware systems, gPTP imposes that, the clocks of all the nodes in the network have to be synchronized to the clock of the Grand Master for flawless communication in the network. The paper proposes a formal model of the gPTP protocol using UPPAAL model checker. This enables us to formally verify the protocol for its properties. The communication between the master and the slave nodes were modeled and it is verified that the divergence between the master clock and the slave clock is always within the precision.
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References
Zeng W, Khalid MA, Chowdhury S (2016) In-vehicle networks outlook: achievements and challenges. IEEE Commun Surv Tutor 18(3):1552–1571
Tuohy S, Glavin M, Hughes C, Jones E, Trivedi M, Kilmartin L (2014) Intra-vehicle networks: a review. IEEE Trans Intell Transp Syst 16(2):534–545
Specification CAN (1991) Robert Bosch GmbH. Stuttgart, Germany
Package, LIN Specification, (2003) Revision 2.0. LIN consortium
FlexRay Consortium J (2005) FlexRay communications system protocol specification version 2.1
Cooperation MOST (2004) MOST Media Oriented Systems Transport specification, version 2.3
Ashjaei M, Bello LL, Daneshtalab M, Patti G, Saponara S, Mubeen S (2021) Time-Sensitive Networking in automotive embedded systems: state of the art and research opportunities. J Syst Architect 117:102137
Prasad M, Dey RK, Sardar A, Goswami G (2014) Ethernet as an emerging trend in vehicle network technology—part I. Auto Tech Rev 3(12):18–23
Prasad M, Dey RK, Sardar A (2015) Ethernet as an emerging trend in vehicle network technology—part II. Auto Tech Rev 4:18–23
Zhao L, He F, Li E, Lu J (2018) Comparison of time sensitive networking (TSN) and TT Ethernet. In 2018 IEEE/AIAA 37th digital avionics systems conference (DASC). IEEE, pp 1–7
Messenger JL (2018) Time-sensitive networking: an introduction. IEEE Commun Stand Mag 2(2):29–33
Finn N (2018) Introduction to time-sensitive networking. IEEE Commun Stand Mag 2(2):22–28
Fuehrer T, Mueller B, Hartwich F, Hugel R (2001) Time triggered CAN (ttcan). SAE transactions, pp 143–149
Le C, Qiao D (2019) Evaluation of real-time ethernet with time synchronization and time-aware shaper using OMNeT++. In: 2019 IEEE 2nd international conference on electronics technology (ICET). IEEE, pp 70–73
Zhou Z, Lee J, Berger MS, Park S, Yan Y (2021) Simulating TSN traffic scheduling and shaping for future automotive Ethernet. J Commun Netw 23(1):53–62
IEEE Standards Association (2011) IEEE Standard for Local and Metropolitan Area Networks-Timing and Synchronization for Time-Sensitive Applications in Bridged Local Area Networks. IEEE Std, 802. 1AS-2011
IEEE Standards Association (2019) IEEE Standard for Local and Metropolitan Area Networks-Timing and Synchronization for Time-Sensitive Applications-IEEE Std 802.1AS-Rev, Draft 8.0
IEEE Standards Association (2008) IEEE Standard 1588-2008 (Revision of IEEE Std 1588-2002), IEEE Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems
Puttnies H, Danielis P, Janchivnyambuu E, Timmermann D (2018) A simulation model of IEEE 802.1 AS gPTP for clock synchronization in OMNeT++. In OMNeT++. EPiC Ser Comput 56:63–72
Jiang J, Li Y, Hong SH, Xu A, Wang K (2018, August) A time-sensitive networking (TSN) simulation model based on OMNET++. In: 2018 IEEE international conference on mechatronics and automation (ICMA). IEEE, pp 643–648
Behrmann G, David A, Larsen KG (2004) A tutorial on UPPAAL. In: Bernardo M, Corradini F (eds) SFM-RT 2004. LNCS, vol. 3185. Springer, Heidelberg, pp. 200–236
Larsen KG, Pettersson P, Yi W (1997) UPPAAL in a nutshell. Int J Softw Tools Technol Transf 1(1):134–152
David A, Larsen KG, Legay A, Mikučionis M, Poulsen DB (2015) Uppaal SMC tutorial. Int J Softw Tools Technol Transf 17(4):397–415
Lamport L (1978) Time, clocks, and the ordering of events in a distributed system, the Ordering of Events in a Distributed System. Commun ACM 21(7):558–565
Rushby J (1994) A formally verified algorithm for clock synchronization under a hybrid fault model. In: Proceedings of the thirteenth annual ACM symposium on Principles of distributed computing, pp 304–313
Rodriguez-Navas G, Proenza J (2012) Using timed automata for modeling distributed systems with clocks: challenges and solutions. IEEE Trans Softw Eng 39(6):857–868
Barsotti D, Nieto LP, Tiu A (2007) Verification of clock synchronization algorithms: experiments on a combination of deductive tools. Formal Aspects Comput 19(3):321–341
Rodríguez-Navas G, Bosch JJ, Proenza J (2003) Hardware design of a high-precision and fault-tolerant clock subsystem for CAN networks. IFAC Proc Vol 36(13):39–46
Rodriguez-Navas G, Proenza J, Hansson H (2005) Using UPPAAL to model and verify a clock synchronization protocol for the controller area network. In: 2005 IEEE conference on emerging technologies and factory automation. IEEE, vol 2
Rodriguez-Navas G, Proenza J, Hansson H (2006) An UPPAAL model for formal verification of master/slave clock synchronization over the controller area network. In: Proceedings of the 6th IEEE international workshop on factory communication systems, Torino, Italy. IEEE Computer Society Press, Los Alamitos
Leen G, Heffernan D (2006) Modeling and verification of a time-triggered networking protocol. In: International conference on networking, international conference on systems and international conference on mobile communications and learning technologies (ICNICONSMCL’06). IEEE, pp 178–178
Leen G, Heffernan D (2002) Formally Verifying Aspects of Time-Triggered Controller Area Network (Phases 1 & 2a). Tech. report, PEI/CSRC report no. 20020603, main library, University of Limerick
Steiner W, Dutertre B (2010) SMT-Based formal verification of a TT Ethernet synchronization function. In: International workshop on formal methods for industrial critical systems. Springer, Berlin, Heidelberg, pp 148–163
Steiner W, Dutertre B (2011) Automated formal verification of the TT Ethernet synchronization quality. In: NASA formal methods symposium. Springer, Berlin, Heidelberg, pp 375–390
Steiner W, Dutertre B (2013) The TT Ethernet synchronisation protocols and their formal verification. Int J Crit Comput Based Syst 174(3):280–300
Ammar M, Mohamed OA (2011) Formal verification of Time-Triggered Ethernet protocol using PRISM model checker. In: Proceedings of ICM 2011. IEEE, pp 1–5
Technical Report Automotive Ethernet: An Overview; http://www.ixiacom.com/sites/default/files/resources/whitepaper/ixiaautomotiveethernetprimerwhitepaper_1.pdf. Accessed 2 October 2019
Ashjaei M, Behnam M, Rodriguez-Navas G, Nolte T (2013) Implementing a clock synchronization protocol on a multi-master switched ethernet network. In: 2013 IEEE 18th conference on emerging technologies & factory automation (ETFA). IEEE, pp 1–10
Gutiérrez M, Steiner W, Dobrin R, Punnekkat S (2017) Synchronization quality of IEEE 802.1 AS in large-scale industrial automation networks. In: 2017 IEEE real-time and embedded technology and applications symposium (RTAS). IEEE, pp 273–282
Garner GM, Ryu H (2011) Synchronization of audio/video bridging networks using IEEE 802.1 AS. IEEE Commun Mag 49(2):140–147
Diarra A, Hogenmueller T, Zimmermann A, Grzemba A, Khan UA (2015) Improved clock synchronization start-up time for Ethernet AVB-based in-vehicle networks. In: 2015 IEEE 20th conference on emerging technologies & factory automation (ETFA). IEEE, pp 1–8
Alur R, Dill DL (1994) A theory of timed automata. Theoret Comput Sci 126(2):183–235
Yi W, Pettersson P, Daniels M (1995) Automatic verification of real-time communicating systems by constraint-solving. In: Formal description techniques VII. Springer, Boston, MA, pp 243–258
Bouyer P (2009) Model-checking timed temporal logics. Electron Notes Theoret Comput Sci 231:323–341
Clarke EM, Emerson EA, Sistla AP (1986) Automatic verification of finite-state concurrent systems using temporal logic specifications. ACM Trans Program Lang Syst (TOPLAS) 8(2):244–263
Burch JR, Clarke EM, McMillan KL, Dill DL, Hwang LJ (1992) Symbolic model checking: 1020 states and beyond. Inf Comput 98(2):142–170
Huang X, Singh A, Smolka SA (2011) Using integer clocks to verify clock-synchronization protocols. Innov Syst Softw Eng 7(2):119–130
Technical Report, gPTP: Proving Time Accuracy for Automotive Systems, https://www.calnexsol.com/zh/docman/techlib/timing-and-sync-lab/215-gptp-for-automotive-systems-1/file. Accessed 27 September 2019
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Asokan, S., Kumar, G.S. Formal modeling of the gPTP clock synchronization algorithm in automotive ethernet. Innovations Syst Softw Eng 19, 265–281 (2023). https://doi.org/10.1007/s11334-022-00483-1
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DOI: https://doi.org/10.1007/s11334-022-00483-1