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Performance Optimization of SAR ADC using Dynamic Controlled Comparator at 45 nm Technology for Biomedical and IoT Applications

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Abstract

The Emerging biomedical applications such as electrocardiography, electroencephalogram, wireless implantable devices have required optimized power-based SAR ADC in them to reduce package cost and to extend battery life. In view of power optimized SAR ADC, a dynamic controlled comparator with novel static power reduction logic incorporated with common mode kickback noise reduction technique is designed at 45 nm technology in CADENCE Virtuoso in this paper. Designed comparator is analyzed in terms of performance parameters; static power dissipation, transient power dissipation, maximum sampling rate, offset voltage and delay. Simulation and behaviour modeling analyses of proposed dynamic comparator has resulted in five times reduction in static power dissipation along with optimization of transient power and sampling rate as well compared to previously available double tail dynamic comparator. Moreover, it has been mentioned that proposed dynamic comparator is dissipating 2.36 pW of static power and 3.59 nW of transient power with sampling rate of 240 KS/s at 0.5 V. Further, the kickback noise of proposed design is limited to 4.7 mV with maximum delay of 124 ps. Finally, the novel outcomes of proposed comparator are the optimization in required parameters such as power, delay, offset voltage and kickback noise for biomedical applications as compared to double tail dynamic comparator. The proposed consideration for SAR ADC can become a backbone for low power biomedical applications.

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Data Availability

All the data has been included in the manuscript and there is no other data and material related with this paper.

Code Availability

The simulation output has been included in the paper as per 45 nm technology node of CADENCE Virtuoso and there is no other code available regarding this paper.

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Authors and Affiliations

  1. Department of Electronics and Communication Engineering, Delhi Technological University, Delhi, 110042, India

    Mohit Tyagi & Poornima Mittal

  2. Department of Electronics and Communication Engineering, KIET Group of Institutions, Delhi-NCR, Ghaziabad, 201206, India

    Mohit Tyagi & Parvin Kumar

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  1. Mohit Tyagi
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  2. Poornima Mittal
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Correspondence to Poornima Mittal.

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Tyagi, M., Mittal, P. & Kumar, P. Performance Optimization of SAR ADC using Dynamic Controlled Comparator at 45 nm Technology for Biomedical and IoT Applications. Wireless Pers Commun 134, 1035–1057 (2024). https://doi.org/10.1007/s11277-024-10971-1

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