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VLSI Implementation of Reliable and Secure Face Recognition System

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Abstract

Biometric authentications systems are being recognized as the better way of securing data or personal devices as they are unique. Face is considered the best way to authenticate, among all the biometric authentication techniques, due to better FAR (False Acceptance Ratio), FRR (False Rejection Ratio), and minimized error as no physical contact is required with the system. Securing the biometric information is important as it is the personal information of the user which could be exploited. The paper presents the design and implement of face recognition system on FPGA (Field Programmable Gate Array) that would provide a secure and reliable face recognition system. In the proposed system, biometric data is not saved in the database directly, instead, random data is saved along with a hash function which is matched during authentication. Reed-Solomon codes along with hash functions are used to correct data along with the additional level of security. The proposed system has best FAR in comparison of similar previous work for biometric authentication. The accuracy of the proposed system also outperforms other related work. The hardware performance also reveals the usefulness of proposed system in real-time authentication applications.

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Acknowledgements

The author would be thankful to Government of India who has supported various EDA tools at SMDP-C2SD Lab. The simulation and synthesis results are carried out through Xilinx Vivado Tool of SMDP-C2SD lab.

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  1. Electronics and Communication Department, Malaviya National Institute of Technology, Jaipur, Rajasthan, India

    Vipul Sharma & Amit M. Joshi

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  1. Vipul Sharma
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  2. Amit M. Joshi
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Correspondence to Amit M. Joshi.

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Sharma, V., Joshi, A.M. VLSI Implementation of Reliable and Secure Face Recognition System. Wireless Pers Commun 122, 3485–3497 (2022). https://doi.org/10.1007/s11277-021-09096-6

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