High Precision Low-Voltage WTA/LTA Circuit for Signal Processing Applications

Abstract

The paper proposes low-voltage current mode winner takes all (WTA)/loser takes all (LTA) circuit which detects maximum and minimum values from the given current inputs simultaneously. The circuit is developed using high swing self-biased cascode current mirror and a subtractor circuit. The cascode current mirror is used to improve the accuracy of current mirroring action over a wide input current range and subtractor circuit is used to compute the difference of two input currents. The proposed circuit operates at supply voltage of 1.1 V with high precision. The output current is mirrored with transfer error of 0.03% while input current is varying from 0 to 40 μA. Simulations have been performed using SPICE level 53 (TSMC) parameters in 0.18 μm CMOS technology. Some of the applications of the proposed WTA/LTA circuit such as half wave rectifier, full wave rectifier and modulus circuit have also been presented to show the effectiveness of the proposed circuit.

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References

  1. 1.

    Yosefi, G., Aminifar, S., Neda, Sh, & Daneshwar, M. A. (2011). Design of a mixed-signal digital CMOS fuzzy logic controller (FLC) chip using new current mode circuits. AEU-International Journal of Electronic and Communications, 65, 173–181.

    Article  Google Scholar 

  2. 2.

    Mesgarzadeh, B. (2004). A CMOS implementation of current-mode min max circuits and a sample fuzzy application. In IEEE international conference on fuzzy systems, Sweden (pp. 941–946).

  3. 3.

    Ramirez-Angulo, J., Ducoudray-Acevedo, G., Carvajal, R. G., & Lopez-Martin, A. (2005). Low-voltage high-performance voltage- mode and current-mode WTA circuits based on flipped voltage followers. IEEE Transactions on Circuits and Systems II: Express Briefs, 52, 420–423.

    Article  Google Scholar 

  4. 4.

    Demosthenous, A., Smedley, S., & Taylor, J. (1998). A CMOS analog winner take-all network for large-scale applications. IEEE Transactions on Circuits and Systems I: Fundamental Theory and Application, 45, 300–304.

    Article  Google Scholar 

  5. 5.

    Prommee, P., & Chattrakun, K. (2011). CMOS WTA maximum and minimum circuits with their applications to analog switch and rectifiers. Microelectronics Journal, 42, 52–62.

    Article  Google Scholar 

  6. 6.

    Moaiyeri, M. H., Chavoshisani, R., Jalali, A., Navi, K., & Hashemipou, O. (2012). High-performance mixed-mode universal min-max circuits for nanotechnology. Journal of Circuits System and Signal Processing, 31, 465–488.

    MathSciNet  Article  Google Scholar 

  7. 7.

    Anderson, J. D. W., Carver, A., Allen, T. P., & Wall, M. F. (1992). CMOS winner-take all circuit with offset adaptation. US Patent 5146106 A.

  8. 8.

    Opris, I. E. (1998). Rail-to-rail multiple-input min/max circuit. IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 45, 137–140.

    Article  Google Scholar 

  9. 9.

    Carvajal, R. J., Lopez-Martin, A., Torralba, A., Galan, J. A. G., Carlosena, A., & Chavero, F. M. (2005). The flipped voltage follower: A useful cell for low voltage low power circuit design. IEEE Transactions on Circuits and Systems I, 52, 1276–1291.

    Article  Google Scholar 

  10. 10.

    Kazeminia, S., Khoei, A., & Hadidi, K. (2007). High speed high precision voltage mode max and min circuits. Journal of Circuits, Systems and Computers, 16, 233–244.

    Article  Google Scholar 

  11. 11.

    Lazzaro, J., Ryckebusch, S., Mahowald, M. A., & Mead, C. A. (1989). Winner-take-all network of O(N) complexity. In Advances in neural information processing systems (pp. 703–711). San Mateo, CA: Morgan Kaufmann Publishers. http://resolver.caltech.edu/CaltechAUTHORS:20141212-145244773.

  12. 12.

    Serrano, T., & Linares-Barranco, B. (1995). A modular current-mode high-precision winner-take-all circuit. IEEE Transactions on Circuits and Systems-II, 42, 132–134.

    Article  Google Scholar 

  13. 13.

    Fish, A., Milrud, V., & Yadid-Pecht, O. (2005). High-speed and high-precision current winner-take-all circuit. IEEE Transactions on Circuits and Systems-II, 52, 131–135.

    Article  Google Scholar 

  14. 14.

    Peymanfar, A., Khoei, A., & Hadidi, K. (2009). Design of a general propose neuro-fuzzy controller by using modified adaptive-network-based fuzzy inference system. AEU-International Journal of Electronic and Communications, 64, 433–442.

    Article  Google Scholar 

  15. 15.

    Rahman, M., Baishnab, K. L., & Talukdar, F. A. (2009). A high speed and high resolution VLSI winner take-all circuit for neural networks and fuzzy systems. In International symposium on signals, circuits and systems, Lasi (pp. 1–4).

  16. 16.

    Alikhani, A., & Ahmadi, A. (2012). A novel current-mode min–max circuit. Analog Integrated Circuits and Signal Processing, 72, 343–350.

    Article  Google Scholar 

  17. 17.

    Abdulla, K. P., & Azeem, M. F. (2013). A CMOS current mode implementation of multiple input fuzzy min and max circuits for analog fuzzy processors. International Journal of Scientific & Engineering Research, 4, 928–933.

    Google Scholar 

  18. 18.

    Ghanavati, B., & Moghaddam, E. T. (2014). Low-voltage current-mode WTA/LTA circuit. Universal Journal of Electrical and Electronic Engineering, 2, 161–164.

    Article  Google Scholar 

  19. 19.

    Prommee, P., Angkeaw, K., Somdunyakanok, M., & Dejhan, K. (2009). CMOS based near zero-offset multiple inputs max–min circuits and its applications. Analog Integrated Circuit and Signal Processing, 61, 93–105.

    Article  Google Scholar 

  20. 20.

    Wang, H., Zeng, Y., & Li, Z. (2014). Current mode maximum and minimum circuit. Applied Mechanics and Materials, 577, 478–481.

    Article  Google Scholar 

  21. 21.

    Soleimani, M., Toofan, S., & Yargholi, M. (2015). High-swing, high-resolution, low-power, low-area voltage-mode LTA/WTA circuits. Journal of Circuits, Systems, and Computers, 24, 1550103(1-15).

    Article  Google Scholar 

  22. 22.

    Khayatzadeh, R., Ghasemzadeh, M., & Mahdavi, S. (2016). A new current mode min-max circuit using CMOS technology for fuzzy applications. In International conference mixed design of integrated circuits and systems, Lodz, Poland (pp. 147–150).

  23. 23.

    Chavoshisan, R., Hossein Moaiyeri, M., & Hashemipour, O. (2015). A high-performance low-voltage current-mode min/max circuit. Compel—The International Journal for Computation and Mathematics in Electrical and Electronic Engineering, 34, 1172–1183.

    Article  Google Scholar 

  24. 24.

    Boussetta, M., Hamdaouy, R., & Slaoui, K. (2018). Implementation of CMOS min–max circuit in 0.13 μm. International Journal of Engineering & Technology, 7, 218–220.

    Google Scholar 

  25. 25.

    Gupta, M., Aggarwal, B., & Kumar, A. G. (2013). A very high performance self-biased cascode current mirror for CMOS technology. Analog Integrated Circuits and Signal Processing, 75, 67–74.

    Article  Google Scholar 

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Correspondence to Rishikesh Pandey.

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Pandey, R., Singh, S. High Precision Low-Voltage WTA/LTA Circuit for Signal Processing Applications. Wireless Pers Commun 107, 1251–1271 (2019). https://doi.org/10.1007/s11277-019-06334-w

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Keywords

  • Current mirror
  • Low-voltage
  • Rectifier
  • SPICE
  • WTA/LTA circuit