Wireless Personal Communications

, Volume 76, Issue 3, pp 569–578 | Cite as

Mobile DDR IO Standard Based High Performance Energy Efficient Portable ALU Design on FPGA

  • Tanesh Kumar
  • Bishwajeet Pandey
  • Teerath Das
  • B. S. Chowdhry


In this work, we are making energy efficient ALU using the most energy efficient LVCMOS IO standard for the highest frequency of i7 processor. It is observed that LVCMOS12 is the most energy efficient than all available LVCMOS having 26.23, 58.37 and 75.65 % less IO power reduction than LVCMOS18, LVCMOS25 and LVCMOS33 respectively at 1 GHz. Then we are making this ALU portable using MOBILE DDR IO standard in place of default LVCMOS33 IO standard which we use in traditional ALU. As we replace LVCMOS with MOBILE DDR, we are achieving 69.07 % portability in terms of IO power and 29.36 % in terms of Leakage power at 2.9 GHz. In next stage, we try to enhance the performance of ALU with MOBILE DDR but not beyond the power consumption with LVCMOS. In that way, we achieve the highest frequency of 12 GHz with MOBILE DDR. That was earlier possible for 3.8 GHz 64-bit ALU using CMOS. In this HDL based implementation of 64-bit ALU on FPGA, Kintex-7 FPGA is used with XC7K70T device and FBG676 package is used.


High performance Portable Energy efficient ALU FPGA 


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Copyright information

© Springer Science+Business Media New York 2014

Authors and Affiliations

  1. 1.Department of Computer ScienceSouth Asian UniversityNew DelhiIndia
  2. 2.Faculty of Electrical and Computer EngineeringMUETJamshoroPakistan

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