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Low-Complexity High-Throughput Bit-Wise LDPC Decoder

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Abstract

Emerging standards for wireless communications in the 60-GHz band, such as WiGig and IEEE 802.11ad, require high throughput between 1.5 and 6 Gb/s. These standards use adaptive low-density parity-check (LDPC) codes for high error correction capability. Most research studies on LDPC decoders have focused on low area implementations, to improve throughput. We previously developed a bit-serial first two minimum-value generator without bit error rate (BER) performance degradation. This paper presents a low-complexity bit-wise LDPC decoder based on bit-serial first two minimum-value generator for a high-data-rate LDPC decoder. We use the throughput-to-area ratio (TAR) metric to compare with other 802.11ad LDPC decoders.

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Acknowledgments

This research was supported by the MSIT(Ministry of Science and ICT), Korea, under the ITRC(Information Technology Research Center) support program(IITP-2018-2016-0-00309-002) supervised by the IITP(Institute for Information & communications Technology Promotion) by the National Research Foundation of Korea by the Korea government (NRF-2017R1A2A2A05001046).

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Authors and Affiliations

  1. SoC Platform Research Center, Korea Electronics Technology Institute, Saenari-ro 25, Bundang-gu, Seongnam-si, Gyeonggi-do, 13509, South Korea

    Jae Hack Lee

  2. Department of Electrical and Computer Engineering, Ajou University, 206 Worldcup-ro, Yeongtong-gu, Suwon, 16499, South Korea

    Myung Hoon Sunwoo

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  1. Jae Hack Lee
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Correspondence to Myung Hoon Sunwoo.

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Lee, J.H., Sunwoo, M.H. Low-Complexity High-Throughput Bit-Wise LDPC Decoder. J Sign Process Syst 91, 855–862 (2019). https://doi.org/10.1007/s11265-018-1398-z

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