CORDIC-Based VLSI Architectures of Running DFT with Refreshing Mechanism

  • Kailash Chandra Ray
  • Anindya Sundar Dhar


Running discrete Fourier transform (running DFT) is being used to overcome the drawbacks of ping pong buffer technique by employing fast Fourier transform (FFT) for real time spectrum analyzer, However, the major drawback of existing MAC or CORDIC (CO-ordinate Rotational DIgital Computer) based computation of running DFT is error accumulation due to finite precision machine and iterative computation which deteriorate the output in long run. Hence, two new alternative CORDIC based architectures with trade-off area and throughput for the computation of running DFT with refreshing mechanism are proposed in this paper to circumvent the problem of error accumulation. The novelty of these two proposed architectures is low hardware complexity or high throughput and provides the spectrum updates on sample-by-sample basis within tolerable error limit. The proposed designs are implemented using verilogHDL and synthesized using commercially available 0.18μ m CMOS technology to estimate its computation performances. The first order hardware complexities of these proposed architectures are compared with existing architectures. The proposed designs in this paper have potential applications for continuous monitoring of Fourier spectrum in the domain of power spectrum analysis, biomedical signal monitoring systems and communication system.


Recursive or running DFT VLSI architecture CORDIC Spectrum analysis 



We would like to thank Dr. S. Singh, Associate Professor, Department of Humanities and Social Sciences, IIT Patna for her valuable suggestions to improve english grammar of the manuscript.


  1. 1.
    Banerjee, A., Dhar, A.S., Banerjee, S. (2001). Fpga realization of a cordic based fft processor for biomedical signal processing. Microprocessors and Microsystems, 25(3), 131–142.CrossRefGoogle Scholar
  2. 2.
    Shuenn-Shyang, W., & Chien-Sung, L. (2007). An area-efficient design of variable length fast Fourier transform processor. Journal of Signal Processing Systems, 51(3), 245–256.Google Scholar
  3. 3.
    Gautam, V., Ray, KC, Haddow, P. (2011). Hardware efficient design of variable length fft processor. In Proceedings of the IEEE 14th international symposium design and diagnostics of electronic circuits and systems (pp. 309–312).Google Scholar
  4. 4.
    Aravena, J. L. (1990). Recursive moving window DFT algorithm. IEEE Transactions on Computers, 39(1), 145–148.MathSciNetCrossRefGoogle Scholar
  5. 5.
    Sherlock, B. G., & Monro, D. M. (1992). Moving discrete Fourier transform. Proceedings of the IEE Radar Signal Processor, 139(4), 279–282.CrossRefGoogle Scholar
  6. 6.
    Manohar Ayinala, Y. L., & Parhi, K. K. (2013). An in-place fft architecture for real-valued signals. IEEE Transactions on Circuits and Systems II: Express Briefs, 60(10), 652–656.CrossRefGoogle Scholar
  7. 7.
    Meher, PK, Mohanty, BK, Patel, SK, Ganguly, S, Srikanthan, T. (2015). Efficient VLSI architecture for decimation-in-time fast fourier transform of real-valued data. IEEE Transactions on Circuits and Systems I: Regular Papers, 62(12), 2836–2845.MathSciNetCrossRefGoogle Scholar
  8. 8.
    Lo, P-C, & Lee, Y-Y. (1999). Real time implementation of the moving FFT algorithm. Signal Processing, 79 (3), 251–259.CrossRefzbMATHGoogle Scholar
  9. 9.
    Lai, S.-C., Juang, W.-H., Chang, C.-L., Lin, C.-C., Luo, C.-H., Lei, S.-F. (2010). Low-computation-cycle, power-efficient, and reconfigurable design of recursive DFT for portable digital radio mondiale receiver. IEEE Transactions on Circuits and Systems II: Express Briefs, 57(8), 647–651.CrossRefGoogle Scholar
  10. 10.
    Darwish, HA, & Fikri, M. (2007). Practical considerations for recursive DFT implementation in numerical relays. IEEE Transactions on Power Delivery, 22(1), 42–49.CrossRefGoogle Scholar
  11. 11.
    Lai, S.-C., Lei, S.-F., Juang, W.-H., Luo, C.-H. (2010). A low-cost, low-complexity, and memory-free architecture of novel recursive DFT and IDFT algorithms for DTMF application. IEEE Transactions on Circuits and Systems II: Express Briefs, 57(9), 711–715.CrossRefGoogle Scholar
  12. 12.
    Varga, L., Kollár, Z., Horváth, P. (2012). Recursive Discrete Fourier Transform based SMT receivers for cognitive radio applications. In Proceedings of the 19th international conference on systems, signals and image processing (pp. 130–133).Google Scholar
  13. 13.
    Alhava, J., & Renfors, M. (2014). Recursive algorithms for modulated and extended lapped transforms. IEEE Transactions on Circuits and Systems I: Regular Papers, 61(1), 191–201.CrossRefGoogle Scholar
  14. 14.
    Inggs, M., van der Byl, A., Tong, C. (2013). Commensal radar: Range-Doppler processing using a recursive DFT. In Proceedings of the IEEE international conference on radar (pp. 292–297).Google Scholar
  15. 15.
    Chen, W., Kehtamavaz, N., Spencer, T. W. (1993). An efficient recursive algorithm for time varying Fourier transform. IEEE Transactions on Signal Processing, 41(7), 2488–2490.CrossRefzbMATHGoogle Scholar
  16. 16.
    Liu, K.J.R., Chiu, C-T, Kolagotla, R. K., Jaja, J. F. (1994). Optimal unified architectures for the real-time computation of time-recursive discrete sinusoidal transform. IEEE Transactions on Circuits and Systems for Video Technology, 4(2), 168–180.CrossRefGoogle Scholar
  17. 17.
    Jacobsen, E., & Lyons, R. (2003). The sliding DFT. IEEE Signal Processing Magazine, 20(2), 74–80.CrossRefGoogle Scholar
  18. 18.
    Kar, D. C., & Rao, V. V. B. (1996). A CORDIC-based unified systolic architecture for sliding window applications of discrete transform. IEEE Transactions on Signal Processing, 44(2), 441–444.CrossRefGoogle Scholar
  19. 19.
    Banerjee, A., & Dhar, A. S. (2005). Novel architecture for QAM modulator-demodulator and its generalization to multicarrier modulation. Microprocessors and Microsystems, 29(1), 351– 357.CrossRefGoogle Scholar
  20. 20.
    Sung, T. U., & Hsin, H. C. (2007). Fixed point error analysis of CORDIC arithmetic for special purpose signal processing. IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, E90-A (9), 2006–2013.CrossRefGoogle Scholar
  21. 21.
    Garrido, M. (2016). The feedforward short-time fourier transform. IEEE Transactions on Circuits and Systems II: Express Briefs, 63(9), 868–872.CrossRefGoogle Scholar
  22. 22.
    Macias, J. A. R., & Exposito, A. G. (1998). Efficient moving window DFT algorithm. IEEE Transactions on Circuits and Systems-II: Analog and Digital Signal Processing, 45(2), 256–260.CrossRefGoogle Scholar
  23. 23.
    Ray, K. C., & Dhar, A. S. (2006). CORDIC based unified VLSI architecture for implementing window functions for real time spectral analysis. IEE Proceedings Circuits, Devices and Systems, 153(6), 539–544.CrossRefGoogle Scholar
  24. 24.
    Meher, P. K., Valls, J., Juang, T.-B., Sridharan, K., Maharatna, K. (2009). 50 Years of CORDIC: algorithms, architectures and applications. IEEE Transactions on Circuits and Systems I: Regular Papers, 56(9), 1893–1906.MathSciNetCrossRefGoogle Scholar
  25. 25.
    Villalba, J., Hidalgo, J. A., Zapata, E. L., Antelo, E., Bruguera, J. D. (1995). CORDIC architectures with parallel compensation of the scale factor. In Proceedings on Application Specific Array Processors. Spain, (Vol. 1 pp. 258–269).Google Scholar
  26. 26.
    Hu, Y. H. (1992). The quantization effects of the CORDIC algorithm. IEEE Transactions on Signal Processing, 40(4), 834–844.CrossRefzbMATHGoogle Scholar
  27. 27.
    Tasche, M, & Zeuner, H. (2003). Roundoff error analysis of the recursive moving window discrete Fourier transform. Advances in Computational Mathematics, 18(1), 65–78.MathSciNetCrossRefzbMATHGoogle Scholar

Copyright information

© Springer Science+Business Media, LLC, part of Springer Nature 2018

Authors and Affiliations

  1. 1.Department of Electrical EngineeringIndian Institute of Technology PatnaPatnaIndia
  2. 2.Department of Electrical and Electronics Communication EngineeringIndian Institute of Technology KharagpurKharagpurIndia

Personalised recommendations