Skip to main content
SpringerLink
Log in

Linear-Phase Lattice FIR Digital Filter Architectures Using Stochastic Logic

  • Published:
Journal of Signal Processing Systems Aims and scope Submit manuscript

Abstract

This paper presents novel architectures for linear-phase FIR digital filters using stochastic computing. Stochastic computing systems require fewer logic gates and are inherently fault-tolerant. Thus, these structures are well suited for nanoscale CMOS technologies. Compared to direct-form linear-phase FIR filters, linear-phase lattice filters require twice the number of multipliers but the same number of adders. The hardware complexities of stochastic implementations of linear-phase FIR filters for direct-form and lattice structures are comparable. This is because multipliers do not require any more area than adders. Two stochastic implementations of lattice FIR filters are proposed in this paper. Using speech signals from ICA ’99 Synthetic Benchmarks, it is shown that, for linear-phase FIR filters, the signal-to-error ratios of stochastic direct-form and stochastic lattice filters are abou the same.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Figure 1
Figure 2
Figure 3
Figure 4
Figure 5
Figure 6
Figure 7
Figure 8
Figure 9
Figure 10
Figure 11
Figure 12
Figure 13
Figure 14
Figure 15
Figure 16
Figure 17
Figure 18
Figure 19
Figure 20
Figure 21
Figure 22

Similar content being viewed by others

References

  1. Gaines, B.R. (1967). Stochastic computing. In Proceedings of AFIPS Spring Joint Computer Conference (pp.149–156). ACM.

  2. Alaghi, A., & Hayes, J.P. (2013). Survey of stochastic computing. ACM Transactions on Embedded computing systems (TECS), 12(2s), 92.

    Article  Google Scholar 

  3. Qian, W., Li, X., Riedel, M.D., Bazargan, K., & Lilja, D.J. (2011). An architecture for fault-tolerant computation with stochastic logic. IEEE Transactions on Computers, 60(1), 93–105.

    Article  MathSciNet  MATH  Google Scholar 

  4. Brown, B.D., & Card, H.C. (2001). Stochastic neural computation. I. computational elements. IEEE Transactions on Computers, 50(9), 891–905.

    Article  MathSciNet  Google Scholar 

  5. Dinu, A., Cirstea, M., & McCormick, M. (2002). Stochastic implementation of motor controllers. In Proceedings of the 2002 IEEE International Symposium on Industrial Electronics (ISIE) (Vol. 2, pp. 639–644).

  6. Chang, Y.-N., & Parhi, K.K. (2013). Architectures for digital filters using stochastic computing. In Proceedings of 2013 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP) (pp. 2697–2701).

  7. Parhi, K.K., & Liu, Y. (2014). Architectures for IIR digital filters using stochastic computing. In Proceedings of 2014 IEEE International Symposium on Circuits and Systems (ISCAS) (pp. 373–376).

  8. Gray, A.Jr., & Markel, J. (1973). Digital lattice and ladder filter synthesis. IEEE Transactions on Audio and Electroacoustics, 21(6), 491–500.

    Article  Google Scholar 

  9. Parhi, K.K. (1999). VLSI digital signal processing systems: design and implementation. Wiley.

  10. Schwarz, K. (1993). Linear phase FIR-filter in lattice structure. In Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS), 1993 (pp. 347–350).

  11. Liu, Y., & Parhi, K.K. (2015). Lattice FIR digital filters using stochastic computing. In Proceedings of 2015 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), Brisbane, Australia (pp. 1027–1031).

  12. ICA’99 synthetic benchmarks. http://sound.media.mit.edu/ica-bench/, Sept. 2014.

  13. Schur, J. (1917). Über potenzreihen, die im innern des einheitskreises beschränkt sind. Journal für die reine und angewandte Mathematik, 147, 205–232. ArchitecturesforstochasticnormalizedandmodifiedlatticeIIRfilters(PacificGrove,CA,2015)

  14. Oppenheim,A.V.,Schafer,R.W.,Buck,J.R.,&etal.(1989).Discrete-timesignalprocessingVol.2. Prentice-hall,EnglewoodCliffs.

  15. Parhi,R.,Kim,C.H.,&Parhi,K.K.(2015).Fault-tolerantripple-carrybinaryadderusingpartialtriple modularredundancy(PTMR).

Download references

Acknowledgments

This research was supported by the National Science Foundation under grant number CCF-1319107.

Author information

Authors and Affiliations

  1. University of Minnesota, Twin Cities, Minneapolis, MN, USA

    Yin Liu & Keshab K. Parhi

Authors
  1. Yin Liu
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Keshab K. Parhi
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Yin Liu.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Liu, Y., Parhi, K.K. Linear-Phase Lattice FIR Digital Filter Architectures Using Stochastic Logic. J Sign Process Syst 90, 791–803 (2018). https://doi.org/10.1007/s11265-017-1224-z

Download citation

  • Received:

  • Revised:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s11265-017-1224-z

Keywords

Search

Navigation