Reconfigurable Parser Architecture Design with Microprogrammed Controller for Multiple Purposes
This paper utilizes the flexibility of microprogrammed controller with reloadable microcodes for developing reconfigurable parser for multiple purposes. Based on control-dataflow, with microprogrammed controller taken into consideration due to the nature of feedback control in parser, this paper proposes a reconfigurable parser through extracting control commonalities to form shared microinstructions so that the current architecture alleviates the cost in switching control signals for distinct purposes. We employ reconfigurable video coding as a case study to justify the advantages in reconfigurable parser with microprogrammed controller in comparison with finite state machine based controller. Using TSMC 0.18 μm CMOS technology at 108 MHz operating frequency, we reduce 8.93 % gate counts and increase throughput rate twice in comparison with individually implemented finite state machine based controller. We have demonstrated that microprogrammed controller is the trend of flexible architecture design for multiple purposes. Owing to high proportion of shared microinstruction, the higher saving ratio could be envision when multiple purposes are involved in the proposed reconfigurable parser, e.g., more video coding standards.
KeywordsParser Reconfigurable architecture Microprogrammed controller
Compliance with ethical standards
We claim that the research work in this manuscript did not involve any Human Participants and/or Animals and no informed consent forms are required to conduct the work in this manuscript. Furthermore, there is no confliction of interest against the disclosure of this manuscript.
- 2.Lee, G.-G., Yang, W.-C., Wu, M.-S., & Lin, H.-Y. (2010). Reconfigurable architecture design of motion compensation for multi-standard video coding. In Circuits and Systems (ISCAS), Proceedings of 2010 I.E. International Symposium on, May 30 2010-June 2 2010 (pp. 2003–2006). doi: 10.1109/ISCAS.2010.5537127.
- 3.Hunag, T.-Y., Lin, H.-Y., Chen, C.-F., & Lee, G. G (2011). Reconfigurable inverse transform architecture for multiple purpose video coding. In Circuits and Systems (ISCAS), 2011 I.E. International Symposium on, 15–18 May 2011 (pp. 1223–1226). doi: 10.1109/ISCAS.2011.5937790.
- 4.Patterson, D. A., & Hennessy, J. L. (2013). Computer organization and design: the hardware/software interface: Newnes.Google Scholar
- 5.ISO/IEC 13818–2 (1996). Information Technology—Coding of moving pictures and associated audio.Google Scholar
- 6.ITU-T Recommendation H.264 (2005), ‘Advanced video coding for generic audiovisual services,’ DraftGoogle Scholar
- 8.ISO/IEC 23001–4:2014 (2014). Information technology—MPEG systems technologies—Part 4: Codec configuration representation.Google Scholar
- 9.ISO/IEC 23002–4:2014 (2014). Information technology—MPEG video technologies—Part 4: Video tool library, 2014.Google Scholar
- 10.Zarrineh, K., & Upadhyaya, S. J (1999). On programmable memory built-in self test architectures. In Design, Automation and Test in Europe Conference and Exhibition 1999. Proceedings, 1999 (pp. 708–713). doi: 10.1109/DATE.1999.761207.
- 11.Barkalov, A., Titarenko, L., & Bieganowski, J (2010). Microprogram control unit with code sharing and extended microinstruction format. In Design & Test Symposium (EWDTS), 2010 East–west, 17–20 Sept. 2010 (pp. 73–76). doi: 10.1109/EWDTS.2010.5742041.
- 12.Kannangara, C. S., Philp, J. M., Richardson, I. E., Bystrom, M., & de Frutos Lopez, M. (2010). A syntax for defining, communicating, and implementing video decoder function and structure. Circuits and Systems for Video Technology, IEEE Transactions on, 20(9), 1176–1186. doi: 10.1109/TCSVT.2010.2051274.CrossRefGoogle Scholar
- 15.‘Text of ISO/IEC 23001–4:2014/PDAM1 Parser instantiation from BSD,’ ISO/IEC JTC1/SC29/WG11 N14963, Strasbourg, FR, Oct. 2014.Google Scholar
- 16.Kim, H., Dong, T., Lee, S., Choi, J., & Jang, E. S. (2014). ‘RVC CE2: Technical Updates and Automated RVC-BSDL Translator for Generic Parser FU (GPFU)’, ISO/IEC JTC1/SC29/WG11 M32447, San Jose, CA.Google Scholar
- 17.Lee, G. G., Chen, C.-F., Xu, S.-M., & Hsiao, C.-J. ‘High-Throughput Reconfigurable Variable Length Coding Decoder for MPEG-2 and AVC/H.264,’ has been accepted in Journal of Signal Processing Systems.Google Scholar
- 18.Lee, G. G., Xu, S.-M., Chen, C.-F., & Hsiao, C.-J. (2012). Architecture of high-throughput context adaptive variable length coding decoder in AVC/H.264. In Signal & Information Processing Association Annual Summit and Conference (APSIPA ASC), 2012 Asia-Pacific, 3–6 Dec. 2012(pp. 1–5)Google Scholar
- 19.Lee, G. G., Chen, Y.-K., Mattavelli, M., & Jang, E. S. (2009). Algorithm/Architecture co-exploration of visual computing on emergent platforms: overview and future prospects. Circuits and Systems for Video Technology, IEEE Transactions on, 19(11), 1576–1587. doi: 10.1109/TCSVT.2009.2031376.CrossRefGoogle Scholar
- 20.Wang, S.-H., Peng, W.-H., He, Y., Lin, G.-Y., Lin, C.-Y., Chang, S.-C., et al. (2005). A software-hardware co-implementation of MPEG-4 Advanced Video Coding (AVC) decoder with block level pipelining. Journal of VLSI signal processing systems for signal, image and video technology, 41(1), 93–110. doi: 10.1007/s11265-005-6253-3.CrossRefGoogle Scholar
- 22.Ke, X., Chiu-Sing, C., Cheong-Fat, C., & Kong-Pong, P (2006). Power-efficient VLSI implementation of bitstream parsing in H.264/AVC decoder. In Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 I.E. International Symposium on, 21–24 May 2006 (pp. 4 pp.). doi: 10.1109/ISCAS.2006.1693839.
- 23.Chang, Y.-T., & Chung, W.-H (2009). A high-performance entropy decoding system for H.264/AVC. In Multimedia and Expo, 2009. ICME 2009. IEEE International Conference on, June 28 2009-July 3 2009 (pp. 1090–1093). doi: 10.1109/ICME.2009.5202688.
- 24.Jeonhak, M., & Seongsoo, L (2008). Design of H.264/AVC entropy decoder without internal ROM/RAM memories. In Communications, Control and Signal Processing, 2008. ISCCSP 2008. 3rd International Symposium on, 12–14 March 2008 (pp. 1464–1467). doi: 10.1109/ISCCSP.2008.4537458.