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Energy-Efficient Allocation of Real-Time Applications onto Single-ISA Heterogeneous Multi-Core Processors

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Abstract

Self-powered systems that interact with the physical world require computing platforms with predictable timing behavior and a low energy demand. Energy consumption can be reduced by choosing energy-efficient designs for both hardware and software components of the platform. We leverage the state-of-the-art in hardware design by adopting Heterogeneous Multi-core Processors with support for Dynamic Voltage and Frequency Scaling and Dynamic Power Management. Through experiments on one such platform, we expose the hardware characteristics that violate assumptions of conventional energy models and propose a revised model suitable for identifying the energy-efficient frequency range. We then address the problem of allocating real-time software components onto heterogeneous cores such that total energy is minimized. Our approach is to start from an analytically justified target load distribution and find a task assignment heuristic that approximates it. Our analysis shows that neither balancing the load nor assigning all load to the “cheapest” core is the best load distribution strategy, unless the cores are extremely alike or extremely different. The optimal load distribution is then formulated as a solution to a convex optimization problem. A heuristic that approximates this load distribution and an alternative method that leverages the solution explicitly are proposed as viable task assignment methods. The proposed methods are compared to state-of-the-art on simulated problem instances and in a case study of a soft-real-time application on an off-the-shelf ARM big.LITTLE heterogeneous processor.

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Notes

  1. All but two applications are included: the pgp application does not support the ARM architecture and blowfish fails at runtime.

  2. The discrepancy between the model and the measured data in the low frequency range is the subject of Section 4.3.

  3. The procedure solves the abstract problem of randomly partitioning an interval into a controllable number of adjacent sub-intervals such that the size of each sub-interval falls within a controllable range. If only one control knob of the two is desired, the solution is relatively straightforward, however if both knobs are desired, some complexity appears to be inevitable.

  4. An analogous study on the more recent Exynos 5422 which does support concurrent cluster execution is planned as future work.

  5. The percentage improvements were calculated from the measured normalized energy values as follows: (1.0−0.66)/1.0=34 % and (0.72−0.66)/0.72=8 %.

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Colin, A., Kandhalu, A. & Rajkumar, R. Energy-Efficient Allocation of Real-Time Applications onto Single-ISA Heterogeneous Multi-Core Processors. J Sign Process Syst 84, 91–110 (2016). https://doi.org/10.1007/s11265-015-0987-3

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