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Overview of the MPEG Reconfigurable Video Coding Framework

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Abstract

Video coding technology in the last 20 years has evolved producing a variety of different and complex algorithms and coding standards. So far the specification of such standards, and of the algorithms that build them, has been done case by case providing monolithic textual and reference software specifications in different forms and programming languages. However, very little attention has been given to provide a specification formalism that explicitly presents common components between standards, and the incremental modifications of such monolithic standards. The MPEG Reconfigurable Video Coding (RVC) framework is a new ISO standard currently under its final stage of standardization, aiming at providing video codec specifications at the level of library components instead of monolithic algorithms. The new concept is to be able to specify a decoder of an existing standard or a completely new configuration that may better satisfy application-specific constraints by selecting standard components from a library of standard coding algorithms. The possibility of dynamic configuration and reconfiguration of codecs also requires new methodologies and new tools for describing the new bitstream syntaxes and the parsers of such new codecs. The RVC framework is based on the usage of a new actor/ dataflow oriented language called CAL for the specification of the standard library and instantiation of the RVC decoder model. This language has been specifically designed for modeling complex signal processing systems. CAL dataflow models expose the intrinsic concurrency of the algorithms by employing the notions of actor programming and dataflow. The paper gives an overview of the concepts and technologies building the standard RVC framework and the non standard tools supporting the RVC model from the instantiation and simulation of the CAL model to software and/or hardware code synthesis.

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References

  1. Bhattacharya, B., & Bhattacharyya, S. (2001). Parameterized dataflow modeling for DSP systems. IEEE Transactions on Signal Processing, 49(10), 2408–2421. doi:10.1109/78.950795.

    Article  MathSciNet  Google Scholar 

  2. Bhattacharyya, S., Brebner, G., Eker, J., Janneck, J., Mattavelli, M., von Platen, C., et al. (2008) OpenDF—A dataflow toolset for reconfigurable hardware and multicore systems. In First Swedish workshop on multi-core computing (MCC) (pp. 43–49).

  3. Bilsen, G., Engels, M., Lauwereins, R., & Peperstraete, J. (1996) Cycle-static dataflow. IEEE Transactions on Signal Processing, 44(2), 397–408. doi:10.1109/78.485935.

    Article  Google Scholar 

  4. Boutellier, J., Lucarz, C., Lafond, S., Gomez, V., & Mattavelli, M. (2009). Quasi-static scheduling of CAL actor networks for reconfigurable video coding. Springer Journal of Signal Processing Systems (Special issue on reconfigurable video coding). doi:10.1007/s11265-009-0389-5.

    Google Scholar 

  5. Buck, J., & Lee, E. (1993). Scheduling dynamic dataflow graphs with bounded memory using the token flow model. In 1993 IEEE international conference on acoustics, speech, and signal processing. ICASSP-93 (Vol. 1, pp. 429–432). doi:10.1109/ICASSP.1993.319147.

  6. Eker, J., & Janneck, J. W. (2003). CAL language report specification of the CAL actor language. Tech. Rep. UCB/ERL M03/48, EECS Department, University of California, Berkeley.

  7. Gu, R., Janneck, J. W., Raulet, M., & Bhattacharyya, S. S. (2009). Exploiting statically schedulable regions in dataflow programs. In International conference on acoustics, speech and signal processing. IEEE conference.

  8. Hind, M. (2001). Pointer analysis: Haven’t we solved this problem yet? In Proceedings of the 2001 ACM SIGPLAN-SIGSOFT workshop on program analysis for software tools and engineering (pp. 54–61). Snowbird: ACM.

    Chapter  Google Scholar 

  9. Hsu, C. J., Ko, M. Y., & Bhattacharyya, S. S. (2005). Software synthesis from the dataflow interchange format. In Proceedings of the 2005 workshop on software and compilers for embedded systems (pp. 37–49). Dallas: ACM. doi:10.1145/1140389.1140394.

    Chapter  Google Scholar 

  10. International Standard ISO/IEC FDIS 23001-5: MPEG systems technologies—Part 5: Bitstream Syntax Description Language (BSDL)

  11. ISO/IEC FDIS 23001-4 (2009). MPEG systems technologies— Part 4: Codec configuration representation.

  12. ISO/IEC FDIS 23002-4 (2009). MPEG video technologies—Part 4: Video tool library.

  13. Janneck, J. W., Miller, I. D., Parlour, D. B., Roquier, G., Wipliez, M., & Raulet, M. (2008). Synthesizing hardware from dataflow programs: An MPEG-4 simple profile decoder case study. In IEEE workshop on signal processing systems, 2008. SiPS 2008 (pp. 287–292). doi:10.1109/SIPS.2008.4671777.

  14. Janneck, J., Miller, I., Parlour, D., Roquier, G., Wipliez, M., & Raulet, M. (2009). Synthesizing hardware from dataflow programs: An MPEG-4 simple profile decoder case study. Springer Journal of Signal Processing Systems (Special issue on reconfigurable video coding). doi:10.1007/s11265-009-0397-5.

    Google Scholar 

  15. Ko, M. Y., Zissulescu, C., Puthenpurayil, S., Bhattacharyya, S., Kienhuis, B., & Deprettere, E. (2007) Parameterized looped schedules for compact representation of execution sequences in DSP hardware and software implementation. IEEE Transactions on Signal Processing, 55(6), 3126–3138. doi:10.1109/TSP.2007.893964.

    Article  MathSciNet  Google Scholar 

  16. Lee, E., & Messerschmitt, D. (1987). Synchronous data flow. Proceedings of the IEEE, 75(9), 1235–1245.

    Article  Google Scholar 

  17. Lucarz, C., Mattavelli, M., Thomas-Kerr, J., & Janneck, J. (2007). Reconfigurable media coding: A new specification model for multimedia coders. In IEEE workshop on signal processing systems (pp. 481–486). doi:10.1109/SIPS.2007.4387595.

  18. Lucarz, C., Piat, J., & Mattavelli, M. (2009). Automatic synthesis of parsers and validation of bitstreams within the MPEG reconfigurable video coding framework. Springer Journal of Signal Processing Systems (Special issue on reconfigurable video coding). doi:10.1007/s11265-009-0395-7

    Google Scholar 

  19. Murthy, P. K., & Bhattacharyya, S. S. (2000). Shared memory implementations of synchronous dataflow specifications. In Proceedings of the conference on design, automation and test in Europe (pp. 404–410). Paris: ACM. doi:10.1145/343647.343809.

    Chapter  Google Scholar 

  20. von Platen, C., & Eker, J. (2008). Efficient realization of a cal video decoder on a mobile terminal (position paper). In IEEE workshop on signal processing systems, 2008. SiPS 2008 (pp. 176–181). doi:10.1109/SIPS.2008.4671758.

  21. Plishker, W., Sane, N., Kiemb, M., Anand, K., & Bhattacharyya, S. S. (2008). Functional DIF for rapid prototyping. In Proceedings of the 2008 the 19th IEEE/IFIP international symposium on rapid system prototyping (Vol. 00, pp. 17–23). Los Alamitos: IEEE Computer Society.

    Chapter  Google Scholar 

  22. Raulet, M., Piat, J., Lucarz, C., & Mattavelli, M. (2008). Validation of bitstream syntax and synthesis of parsers in the MPEG reconfigurable video coding framework. In IEEE Workshop on Signal Processing Systems, 2008. SiPS 2008 (pp. 293–298). doi:10.1109/SIPS.2008.4671778.

  23. Roquier, G., Wipliez, M., Raulet, M., Janneck, J. W., Miller, I. D., & Parlour, D. B. (2008). Automatic software synthesis of dataflow program: An MPEG-4 simple profile decoder case study. In IEEE workshop on signal processing systems, 2008. SiPS 2008 (pp. 281–286). doi:10.1109/SIPS.2008.4671776.

  24. Sriram, S., & Bhattacharyya, S. S. (2000). Embedded multiprocessors: Scheduling and synchronization. New York: Marcel Dekker.

    Google Scholar 

  25. Wipliez, M., Roquier, G., & Nezan, J. (2009). Software code generation for the RVC-CAL language. Springer Journal of Signal Processing Systems (Special issue on reconfigurable video coding). doi:10.1007/s11265-009-0390-z.

    Google Scholar 

  26. Zima, H., & Chapman, B. (1991). Supercompilers for parallel and vector computers. New York: ACM.

    Google Scholar 

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Correspondence to Mickaël Raulet.

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Bhattacharyya, S.S., Eker, J., Janneck, J.W. et al. Overview of the MPEG Reconfigurable Video Coding Framework. J Sign Process Syst 63, 251–263 (2011). https://doi.org/10.1007/s11265-009-0399-3

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